18624954. WAFER BONDING METHOD simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Contents
WAFER BONDING METHOD
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Yung-Chi Lin of Su-Lin City (TW)
Wen-Chih Chiou of Zhunan Township (TW)
WAFER BONDING METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18624954 titled 'WAFER BONDING METHOD
The abstract of the patent application describes a device comprising two wafers bonded together, each with a substrate and an interconnect structure that are laterally offset from each other.
- The device includes a first wafer with a first substrate and interconnect structure, forming an obtuse angle with the first substrate's sidewall.
- A second wafer is bonded to the first wafer, with a second substrate and interconnect structure that are laterally offset from the first substrate and the second interconnect structure.
Potential Applications: - This technology could be used in semiconductor manufacturing for creating complex integrated circuits. - It may also have applications in microelectronics for improving the performance of electronic devices.
Problems Solved: - This innovation addresses the challenge of integrating different components with precise alignment and spacing. - It helps in enhancing the functionality and efficiency of electronic devices.
Benefits: - Improved performance and reliability of integrated circuits. - Enhanced precision and accuracy in the manufacturing process.
Commercial Applications: - This technology could be valuable in the semiconductor industry for developing advanced electronic devices. - It may also find applications in the consumer electronics market for producing high-performance gadgets.
Questions about the technology: 1. How does the lateral offset between the substrates and interconnect structures benefit the device's performance? 2. What are the potential challenges in scaling up this technology for mass production?
Original Abstract Submitted
In an embodiment, a device includes: a first wafer including a first substrate and a first interconnect structure, a sidewall of the first interconnect structure forming an obtuse angle with a sidewall of the first substrate; and a second wafer bonded to the first wafer, the second wafer including a second substrate and a second interconnect structure, the sidewall of the first substrate being laterally offset from a sidewall of the second substrate and a sidewall of the second interconnect structure.
