18624411. Integrated Circuit Package For High Bandwidth Memory simplified abstract (GOOGLE LLC)
Contents
Integrated Circuit Package For High Bandwidth Memory
Organization Name
Inventor(s)
Nam Hoon Kim of San Jose CA (US)
Woon Seong Kwon of Santa Clara CA (US)
Teckgyu Kang of Saratoga CA (US)
Yujeong Shim of Cupertino CA (US)
Integrated Circuit Package For High Bandwidth Memory - A simplified explanation of the abstract
This abstract first appeared for US patent application 18624411 titled 'Integrated Circuit Package For High Bandwidth Memory
The abstract describes an integrated circuit package that includes a substrate for high-bandwidth memory (HBM) stacks, an interposer for a logic die, interposer channels connecting the logic die to the HBM stacks, and substrate traces interfacing the channels to the HBM stacks.
- Substrate configured for HBM stacks
- Interposer for logic die
- Interposer channels connecting logic die to HBM stacks
- Substrate traces interfacing channels to HBM stacks
- Integration of high-bandwidth memory technology into a compact package
Potential Applications: - High-performance computing systems - Data centers - Artificial intelligence applications - Graphics processing units - Networking equipment
Problems Solved: - Increased data transfer speeds - Enhanced memory bandwidth - Improved overall system performance
Benefits: - Faster data processing - Higher memory bandwidth - Improved system efficiency - Compact design for space-saving
Commercial Applications: Title: "Next-Generation High-Bandwidth Memory Integrated Circuit Package" This technology could revolutionize the performance of high-speed computing systems, data centers, and AI applications. It offers a compact and efficient solution for handling large amounts of data with high bandwidth requirements.
Questions about the technology: 1. How does this integrated circuit package improve data processing speeds? 2. What are the key advantages of using HBM technology in this package?
Original Abstract Submitted
An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.
