18618133. SEMICONDUCTOR PACKAGE INCLUDING POST simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE INCLUDING POST
Organization Name
Inventor(s)
Hyungsun Jang of Hwaseong-si (KR)
Gayoung Kim of Hwaseong-si (KR)
Minjeong Shin of Suwon-si (KR)
SEMICONDUCTOR PACKAGE INCLUDING POST - A simplified explanation of the abstract
This abstract first appeared for US patent application 18618133 titled 'SEMICONDUCTOR PACKAGE INCLUDING POST
The semiconductor package described in the patent application includes a lower redistribution layer on the lower surface of the semiconductor chip, with various components such as an insulating layer, redistribution pattern, via, under bump metal (UBM), and post.
- The post vertically overlaps with the UBM, and a mold layer surrounds the semiconductor chip.
- A connecting terminal is linked to the UBM, which consists of a first section contacting the redistribution pattern and a second section contacting the insulating layer.
- The post has a ring shape with inner and outer surfaces, where the maximum width of the inner surface is less than the maximum width of the upper surface of the first section of the UBM.
- The maximum width of the outer surface of the post is greater than the maximum width of the upper surface of the first section of the UBM.
Potential Applications: - This technology can be used in various semiconductor packaging applications to improve performance and reliability. - It can be beneficial in the manufacturing of advanced electronic devices where space-saving and efficient heat dissipation are crucial.
Problems Solved: - Enhances the connection reliability between the semiconductor chip and the package components. - Improves the thermal management of the semiconductor package.
Benefits: - Increased reliability and performance of semiconductor packages. - Enhanced thermal dissipation capabilities. - Space-saving design for compact electronic devices.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Improved Performance This technology can be utilized in the production of high-performance electronic devices such as smartphones, tablets, and laptops, where compact size and efficient heat dissipation are essential for optimal performance.
Questions about Semiconductor Packaging Technology: 1. How does the post in the semiconductor package improve the connection reliability? The post vertically overlaps with the UBM, providing a stable connection between the various components of the package.
2. What are the benefits of using a ring-shaped post in semiconductor packaging? The ring-shaped post allows for efficient heat dissipation and space-saving design in electronic devices.
Original Abstract Submitted
A semiconductor package includes a lower redistribution layer disposed on a lower surface of the semiconductor chip including an insulating layer, a redistribution pattern, a via, an under bump metal (UBM), and a post disposed on the redistribution pattern. The post vertically overlaps with the UBM. A mold layer is on the lower redistribution layer and surrounds the semiconductor chip. A connecting terminal is connected to the UBM. The UBM includes a first section contacting the redistribution pattern, and a second section contacting the insulating layer. The post has a ring shape having an inner surface and an outer surface when viewed in a top view. A maximum width of the inner surface is less than a maximum width of an upper surface of the first section. A maximum width of the outer surface is greater than the maximum width of the upper surface of the first section.
