18617530. SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chung-Shi Liu of Hsinchu (TW)

Chien-Hsun Lee of Chu-tung Town (TW)

Jiun Yi Wu of Zhongli (TW)

Hao-Cheng Hou of Hsinchu (TW)

Hung-Jen Lin of Tainan (TW)

Jung Wei Cheng of Hsinchu (TW)

Tsung-Ding Wang of Tainan (TW)

Yu-Min Liang of Zhongli (TW)

Li-Wei Chou of Taoyuan (TW)

SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18617530 titled 'SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME

The embodiment semiconductor package described in the abstract consists of a bare semiconductor chip, a packaged semiconductor chip adjacent to the bare chip, a redistribution structure bonded to both chips, an underfill between the bare chip and the redistribution structure, and a molding compound encapsulating the chips and underfill.

• The redistribution structure includes three layers: a first layer with a certain thickness, a second layer with a different thickness, and a third layer between the first and second layers with a greater thickness than both.

• The underfill serves as a protective layer between the bare chip and the redistribution structure.

• The molding compound encapsulates the entire package, providing further protection and stability to the semiconductor chips.

• This packaging design enhances the overall durability and reliability of the semiconductor package.

• The specific layering and bonding techniques used in this package contribute to its structural integrity and performance.

Potential Applications: This semiconductor packaging technology can be applied in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics. It can also be used in industrial applications where robust and reliable semiconductor packages are required.

Problems Solved: This technology addresses the need for secure and stable packaging for semiconductor chips, reducing the risk of damage and improving overall performance and longevity of electronic devices.

Benefits: The benefits of this technology include enhanced durability, improved reliability, and increased protection for semiconductor chips, leading to better performance and longer lifespan of electronic devices.

Commercial Applications: This semiconductor packaging technology can be utilized by semiconductor manufacturers, electronic device manufacturers, and other industries requiring reliable and durable packaging for their products. It can lead to the development of more robust and long-lasting electronic devices, enhancing customer satisfaction and brand reputation.

Questions about Semiconductor Packaging: 1. How does the redistribution structure contribute to the overall durability of the semiconductor package? 2. What are the specific advantages of using an underfill in semiconductor packaging?

Original Abstract Submitted

An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.