18617113. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Seokgeun Ahn of Cheonan-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18617113 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation:

The semiconductor package described in the patent application includes a package substrate with a concave portion, through-holes, and semiconductor chips mounted on the substrate. A molding portion covers the chips and fills the through-holes.

  • The semiconductor package has a unique design with a concave portion and oblique through-holes.
  • Multiple semiconductor chips are mounted on the package substrate.
  • A molding portion covers the chips and fills the through-holes for protection and stability.

Key Features and Innovation:

  • Package substrate with a concave portion and oblique through-holes.
  • Plurality of semiconductor chips mounted on the substrate.
  • Molding portion for covering and protecting the semiconductor chips.

Potential Applications:

This technology can be used in various electronic devices such as smartphones, tablets, and computers.

Problems Solved:

This technology addresses the need for a compact and efficient packaging solution for semiconductor chips.

Benefits:

  • Improved protection and stability for semiconductor chips.
  • Space-saving design with the concave portion and oblique through-holes.

Commercial Applications:

Potential commercial applications include consumer electronics, automotive electronics, and industrial equipment.

Questions about Semiconductor Package Technology: 1. How does the concave portion of the package substrate contribute to the overall design? 2. What are the advantages of using oblique through-holes in the semiconductor package design?

Frequently Updated Research:

There may be ongoing research in the field of semiconductor packaging technology to further enhance the performance and efficiency of these packages.


Original Abstract Submitted

A semiconductor package is provided. The semiconductor package includes: a package substrate having a first surface, a second surface that is provided opposite the first surface and has a concave portion, and a through-hole having a side surface that is oblique with respect to the first surface, and a first diameter of a first opening of the through-hole defined through the first surface being less than a second diameter of a second opening of the through-hole defined through a bottom surface of the concave portion; a plurality of first semiconductor chips provided on the first surface; a second semiconductor chip provided on the bottom surface; and a molding portion provided in the through-hole, and covering the plurality of first semiconductor chips and the second semiconductor chip.