18615654. HYPERCHIP simplified abstract (Intel Corporation)
Contents
HYPERCHIP
Organization Name
Inventor(s)
Wilfred Gomes of Portland OR (US)
Rajesh Kumar of Portland OR (US)
Pooya Tadayon of Portland OR (US)
Doug Ingerly of Portland OR (US)
HYPERCHIP - A simplified explanation of the abstract
This abstract first appeared for US patent application 18615654 titled 'HYPERCHIP
Simplified Explanation: The patent application describes hyperchip structures and methods of fabricating hyperchips. In one example, an integrated circuit assembly includes two chips stacked in a device side to device side configuration, with the second chip being smaller than the first chip.
- The integrated circuit assembly includes a first integrated circuit chip with transistor devices and contact points on the device side, and a second integrated circuit chip with contact points on the device side.
- The second chip is placed on top of the first chip in a device side to device side configuration, with contact points of both chips being coupled together.
- The second chip is smaller than the first chip when viewed from the top.
Key Features and Innovation:
- Stacking of integrated circuit chips in a device side to device side configuration.
- Coupling of contact points between stacked chips.
- Size difference between the first and second chips.
Potential Applications:
- High-density integrated circuits.
- Miniaturized electronic devices.
- Advanced semiconductor technology.
Problems Solved:
- Increasing circuit density.
- Enhancing performance in a smaller form factor.
- Facilitating complex electronic systems.
Benefits:
- Improved functionality in a compact space.
- Enhanced efficiency and performance.
- Simplified integration of multiple chips.
Commercial Applications: The hyperchip technology could be utilized in the development of compact and high-performance electronic devices, such as smartphones, tablets, wearables, and IoT devices. The miniaturization and increased functionality offered by hyperchips could revolutionize the semiconductor industry.
Questions about Hyperchip Technology: 1. How does hyperchip technology compare to traditional chip stacking methods? 2. What are the potential challenges in mass-producing hyperchips for commercial applications?
Frequently Updated Research: Ongoing research in hyperchip technology focuses on optimizing the fabrication process, improving interconnectivity between stacked chips, and exploring new applications in various industries. Stay updated on the latest advancements in hyperchip technology to understand its evolving potential.
Original Abstract Submitted
Hyperchip structures and methods of fabricating hyperchips are described. In an example, an integrated circuit assembly includes a first integrated circuit chip having a device side opposite a backside. The device side includes a plurality of transistor devices and a plurality of device side contact points. The backside includes a plurality of backside contacts. A second integrated circuit chip includes a device side having a plurality of device contact points thereon. The second integrated circuit chip is on the first integrated circuit chip in a device side to device side configuration. Ones of the plurality of device contact points of the second integrated circuit chip are coupled to ones of the plurality of device contact points of the first integrated circuit chip. The second integrated circuit chip is smaller than the first integrated circuit chip from a plan view perspective.
