18613338. INTEGRATED CIRCUIT DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
INTEGRATED CIRCUIT DEVICE
Organization Name
Inventor(s)
Myunggil Kang of Suwon-si (KR)
INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18613338 titled 'INTEGRATED CIRCUIT DEVICE
The abstract describes an integrated circuit device with a first nano-sheet stack, gate line, vertical structure, and gate dielectric layer.
- The device includes a plurality of nano-sheets arranged on a fin-type active region.
- A gate line extends in a second horizontal direction on the fin-type active region.
- A vertical structure contacts the nano-sheets.
- A first gate dielectric layer is disposed between the gate line and the nano-sheets and between the gate line and the vertical structure.
- The gate line includes a first sub-gate portion under each nano-sheet.
- The first gate dielectric layer has a first portion between the gate line and the nano-sheets, and a second portion between the first sub-gate portion and the vertical structure.
- The thickness of the second portion in the second horizontal direction is greater than the thickness of the first portion in the vertical direction.
Potential Applications: - Advanced semiconductor devices - High-performance integrated circuits
Problems Solved: - Enhanced performance and efficiency in integrated circuits - Improved gate dielectric layer design for nano-sheet stacks
Benefits: - Increased speed and reliability of electronic devices - Higher integration density for compact designs
Commercial Applications: Title: Advanced Nano-Sheet Stack Integrated Circuits for High-Performance Electronics This technology can be applied in: - Consumer electronics - Telecommunications - Automotive industry
Questions about the technology: 1. How does the design of the gate dielectric layer impact the performance of the integrated circuit device? 2. What advantages does the use of nano-sheet stacks offer compared to traditional semiconductor structures?
Original Abstract Submitted
An integrated circuit device includes, a first nano-sheet stack including a plurality of nano-sheets arranged on a fin-type active region extending in a first horizontal direction, a gate line extending in a second horizontal direction on the fin-type active region, a vertical structure contacting the plurality of nano-sheets, and a first gate dielectric layer disposed between the gate line and the plurality of nano-sheets and between the gate line and the vertical structure, wherein the gate line includes a first sub-gate portion disposed under each of the plurality of nano-sheets, the first gate dielectric layer includes a first portion disposed between the gate line and the plurality of nano-sheets, and a second portion disposed between the first sub-gate portion and the vertical structure, and a thickness of the second portion in the second horizontal direction is greater than a thickness of the first portion in the vertical direction.
