18612028. MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract (Micron Technology, Inc.)

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MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL

Organization Name

Micron Technology, Inc.

Inventor(s)

Tomoharu Tanaka of Yokohama (JP)

Huai-Yuan Tseng of San Ramon CA (US)

Dung V. Nguyen of San Jose CA (US)

Kishore Kumar Muchherla of Fremont CA (US)

Eric N. Lee of San Jose CA (US)

Akira Goda of Tokyo (JP)

James Fitzpatrick of Laguna Niguel CA (US)

Dave Ebsen of Minnetonka MN (US)

MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL - A simplified explanation of the abstract

This abstract first appeared for US patent application 18612028 titled 'MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL

Simplified Explanation:

This patent application describes a memory device that can merge data from two memory cells without erasing the second memory cell.

  • The controller in the memory device can program different numbers of bits to different memory cells.
  • After programming the second memory cell, the controller can merge a subset of the data from the first memory cell into the second memory cell.
  • This merging process does not erase the second memory cell, allowing for the storage of more data in a single cell.

Key Features and Innovation:

  • Ability to program different numbers of bits to different memory cells.
  • Merging of data from two memory cells without erasing the second cell.
  • Efficient use of memory space by storing more data in a single cell.

Potential Applications:

  • Data storage devices
  • Embedded systems
  • Mobile devices

Problems Solved:

  • Efficient use of memory space
  • Increased data storage capacity
  • Simplified data management

Benefits:

  • Higher data storage capacity
  • Improved data management efficiency
  • Cost-effective memory solutions

Commercial Applications:

Memory devices incorporating this technology could be used in various industries such as consumer electronics, automotive, and telecommunications for efficient data storage and management.

Questions about Memory Device Technology: 1. How does the merging process in the memory device work? 2. What are the potential limitations of merging data from two memory cells in this way?

Frequently Updated Research:

Stay updated on advancements in memory device technology, particularly in the area of data storage and management, to understand the latest trends and innovations in the field.


Original Abstract Submitted

A memory device includes an array of memory cells and a controller configured to access the array of memory cells. The controller is further configured to program a first number of bits to a first memory cell of the array of memory cells and program a second number of bits to a second memory cell of the array of memory cells. The controller is further configured to following a period after programming the second number of bits to the second memory cell, merge at least a subset of the first number of bits stored in the first memory cell to the second number of bits stored in the second memory cell without erasing the second memory cell such that the second number of bits plus at least the subset of the first number of bits are stored in the second memory cell.