18611450. ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC simplified abstract (Micron Technology, Inc.)

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

Organization Name

Micron Technology, Inc.

Inventor(s)

Kishore Kumar Muchherla of San Jose CA (US)

Niccolo’ Righetti of Boise ID (US)

Sivagnanam Parthasarathy of Carlsbad CA (US)

Mustafa N. Kaynak of San Diego CA (US)

Mark A. Helm of Santa Cruz CA (US)

James Fitzpatrick of Laguna Niguel CA (US)

Ugo Russo of Boise ID (US)

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC - A simplified explanation of the abstract

This abstract first appeared for US patent application 18611450 titled 'ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

The abstract of this patent application describes a method involving determining a memory endurance state metric for a segment of a memory device, calculating a target code rate based on this metric, and adjusting the code rate of the memory device accordingly.

• The method involves assessing the health of a memory segment to optimize its performance.
• By adjusting the code rate based on the memory endurance state metric, the memory device can operate more efficiently.
• The code rate reflects the ratio of memory units designated for storing data to the total number of memory units for storing data and error correction metadata.
• This innovation aims to enhance the reliability and longevity of memory devices in a memory sub-system.
• The method helps in maintaining the integrity of data stored in memory devices by dynamically adjusting the code rate.

Potential Applications: This technology can be applied in various memory systems, such as solid-state drives, to improve their performance and reliability. It can be utilized in data centers, servers, and other computing systems where memory endurance is crucial. This method can also be beneficial in embedded systems and IoT devices to enhance data storage capabilities.

Problems Solved: Addresses the issue of memory degradation and endurance in memory devices. Optimizes the performance of memory systems by dynamically adjusting the code rate. Enhances the reliability of data stored in memory devices by monitoring their health.

Benefits: Improves the overall performance and longevity of memory devices. Enhances data integrity and reliability in memory sub-systems. Optimizes the storage capacity and efficiency of memory systems.

Commercial Applications: Title: "Dynamic Code Rate Adjustment for Memory Devices" This technology can be commercialized by memory device manufacturers to offer more reliable and efficient products. It can be integrated into various storage solutions to enhance their performance and durability, catering to the needs of data-intensive applications.

Questions about Dynamic Code Rate Adjustment for Memory Devices: 1. How does the method of adjusting the code rate based on the memory endurance state metric improve the performance of memory devices? 2. What are the potential implications of this technology in the data storage industry?

Original Abstract Submitted

A method includes determining, by a processing device, a value of a memory endurance state metric associated with a segment of a memory device in a memory sub-system; determining a target value of a code rate based on the value of the memory endurance state metric, and adjusting the code rate of the memory device according to the target value, wherein the code rate reflects a ratio of a number of memory units designated for storing host-originated data to a total number of memory units designated for storing the host-originated data and error correction metadata.