18609255. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18609255 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application includes a first wiring structure with a first wiring, a first semiconductor chip, a molding member, a second wiring structure with a second wiring and a heat conductive metal, a second semiconductor chip, first bumps, an underfill layer, and a first thermal interface material (TIM).
- The first semiconductor chip is placed on the first wiring structure, surrounded by a molding member.
- A second wiring structure, consisting of a second wiring and a heat conductive metal, is located on top of the molding member.
- The second semiconductor chip is positioned on the upper surface of the second wiring structure.
- A plurality of first bumps are present between the second wiring structure and the second semiconductor chip.
- An underfill layer covers the first bumps for protection.
- A first thermal interface material (TIM) is located on the upper surface of the heat conductive metal, which does not overlap with the first bumps in the vertical direction.
Potential Applications: This semiconductor package design can be used in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics. It can also be applied in industrial equipment, automotive systems, and medical devices that require high-performance semiconductor packages.
Problems Solved: This technology addresses the need for efficient heat dissipation in semiconductor packages. It also provides a reliable and durable structure for semiconductor chips, ensuring long-term performance and stability.
Benefits: Improved thermal management for semiconductor chips, leading to enhanced overall performance. Enhanced reliability and durability of semiconductor packages, reducing the risk of malfunctions or failures. Potential for smaller form factors and increased energy efficiency in electronic devices.
Commercial Applications: This semiconductor package design has significant commercial potential in the consumer electronics market, industrial applications, automotive industry, and medical device sector. It can be utilized by semiconductor manufacturers, electronic device manufacturers, and other industries requiring high-performance semiconductor packages.
Questions about the technology: 1. How does the heat conductive metal in the second wiring structure contribute to thermal management in the semiconductor package? 2. What are the advantages of having a first thermal interface material (TIM) on the upper surface of the heat conductive metal in this semiconductor package design?
Original Abstract Submitted
The disclosure provides a semiconductor package including a first wiring structure including a first wiring, a first semiconductor chip on the first wiring structure, a molding member surrounding the first semiconductor chip, a second wiring structure on an upper surface of the molding member and including a second wiring and a heat conductive metal, a second semiconductor chip on an upper surface of the second wiring structure, a plurality of first bumps between the second wiring structure and the second semiconductor chip, an underfill layer covering the plurality of first bumps, and a first thermal interface material (TIM) on an upper surface of the heat conductive metal, the heat conductive metal not overlapping the plurality of first bumps in the vertical direction.
