18606081. INTERGRATED CIRCUIT DEVICES simplified abstract (Samsung Electronics Co., Ltd.)
Contents
INTERGRATED CIRCUIT DEVICES
Organization Name
Inventor(s)
Kyunghwan Lee of Suwon-si (KR)
INTERGRATED CIRCUIT DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18606081 titled 'INTERGRATED CIRCUIT DEVICES
The abstract describes an integrated circuit device with specific components arranged in a unique configuration.
- Source line on substrate in a first horizontal direction
- Channel layer in a vertical direction with trapping layer on one sidewall
- Word line crossing the first horizontal direction on trapping layer
- Gate insulation layer between trapping layer and word line
- Bit line connected to channel layer in the first horizontal direction
- Channel layer with a certain bandgap energy, trapping layer with higher bandgap energy
Key Features and Innovation:
- Unique arrangement of source line, channel layer, trapping layer, word line, gate insulation layer, and bit line
- Trapping layer with higher bandgap energy for improved performance
Potential Applications:
- Semiconductor devices
- Memory storage devices
- Integrated circuits
Problems Solved:
- Enhanced performance and efficiency in integrated circuit devices
- Improved trapping of charge carriers in the channel layer
Benefits:
- Higher efficiency and performance in semiconductor devices
- Increased data storage capacity in memory devices
Commercial Applications:
- Semiconductor industry for manufacturing advanced integrated circuits
- Memory storage industry for developing high-capacity storage devices
Questions about the Technology: 1. How does the trapping layer with higher bandgap energy improve the performance of the integrated circuit device? 2. What are the specific advantages of the unique configuration of components in this integrated circuit device?
Frequently Updated Research:
- Ongoing research in semiconductor materials and device design for improved performance and efficiency.
Original Abstract Submitted
Provided is an integrated circuit device including a source line extending in a first horizontal direction on a substrate, a channel layer extending in a vertical direction, disposed on the source line, and having a first sidewall and a second sidewall, a trapping layer on the first sidewall of the channel layer and including an oxide semiconductor, a word line on at least one sidewall of the trapping layer and extending in a second horizontal direction crossing the first horizontal direction, a gate insulation layer between the at least one sidewall of the trapping layer and the word line, and a bit line electrically connected to the channel layer and extending in the first horizontal direction, wherein the channel layer has a first bandgap energy, and the trapping layer has a second bandgap energy that is greater than the first bandgap energy.
