18605400. STACKED INTEGRATED CIRCUIT DEVICES simplified abstract (Samsung Electronics Co., Ltd.)
Contents
STACKED INTEGRATED CIRCUIT DEVICES
Organization Name
Inventor(s)
STACKED INTEGRATED CIRCUIT DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18605400 titled 'STACKED INTEGRATED CIRCUIT DEVICES
The abstract describes a stacked integrated circuit device with multiple transistors arranged in different layers, including pull-up transistors, pull-down transistors, and pass-gate transistors, connected by contacts and gate contacts, with an upper wire extending in a horizontal direction.
- The device features a unique stacked design with transistors in different layers.
- Pull-up and pull-down transistors are in separate layers at different vertical levels.
- Pass-gate transistors are also included in the design.
- Contacts electrically connect source/drain regions of different transistors.
- Gate contacts connect gate electrodes of specific transistors.
- An upper wire extends horizontally to connect the contacts and gate contacts.
Potential Applications: - This technology could be used in advanced integrated circuits for various electronic devices. - It may enhance the performance and efficiency of semiconductor devices.
Problems Solved: - The design allows for more compact and efficient integration of transistors in a stacked configuration. - It enables better connectivity and functionality in complex circuitry.
Benefits: - Improved circuit density and performance. - Enhanced functionality and connectivity in integrated circuits.
Commercial Applications: Title: Advanced Stacked Integrated Circuit Technology for Enhanced Performance This technology could have applications in the semiconductor industry for developing high-performance electronic devices, such as smartphones, computers, and IoT devices. The compact design and improved connectivity offered by this innovation could lead to more efficient and powerful integrated circuits.
Questions about Stacked Integrated Circuit Technology: 1. How does the stacked design of this integrated circuit device improve performance compared to traditional layouts? 2. What are the potential challenges in manufacturing and scaling up production of stacked integrated circuit devices?
Original Abstract Submitted
A stacked integrated circuit device includes a plurality of transistors including a pair of pull-up transistors in a first layer, a pair of pull-down transistors in a second layer that is at a different vertical level than the first layer, and a pair of pass-gate transistors in the first or second layer, a contact configured to electrically connect a source/drain region of one of the pull-up transistors, a source/drain region of one of the pull-down transistors, and a source/drain region of one of the pass-gate transistors to one another, a gate contact configured to connect a gate electrode of the other pull-up transistor to a gate electrode of the other pull-down transistor, and an upper wire on the contact and the gate contact, the upper wire extending in a first horizontal direction and being connected to the contact and the gate contact.
