18602593. I/O CIRCUIT DESIGN FOR SRAM-BASED PUF GENERATORS simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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I/O CIRCUIT DESIGN FOR SRAM-BASED PUF GENERATORS

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Jui-Che Tsai of Tainan City (TW)

Shih-Lien Linus Lu of Hsinchu (TW)

Cheng Hung Lee of Hsinchu (TW)

Chia-En Huang of Hsinchu County (TW)

I/O CIRCUIT DESIGN FOR SRAM-BASED PUF GENERATORS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18602593 titled 'I/O CIRCUIT DESIGN FOR SRAM-BASED PUF GENERATORS

The abstract describes an input/output circuit for a physical unclonable function (PUF) generator circuit, which includes a PUF cell array and at least one I/O circuit.

  • The PUF generator comprises a PUF cell array with multiple bit cells arranged in columns and rows.
  • The I/O circuit is connected to neighboring columns of the PUF cell array and includes a sense amplifier (SA) without a cross-coupled pair of transistors.
  • The SA consists of two cross-coupled inverters with no access transistor and a SA enable transistor, enabling access and determination of logical states of neighboring bit cells.
  • Based on the logical states of the bit cells, the I/O circuit generates a PUF signature.

Potential Applications: - Secure authentication systems - Anti-counterfeiting measures - Secure key generation for encryption

Problems Solved: - Preventing cloning of PUF circuits - Enhancing security in hardware-based authentication systems

Benefits: - Increased security against cloning - Reliable generation of unique PUF signatures - Enhanced protection of sensitive data

Commercial Applications: Title: Secure Authentication Systems with Enhanced PUF Technology This technology can be utilized in industries such as cybersecurity, IoT devices, and secure access control systems to ensure secure and reliable authentication processes.

Questions about the technology: 1. How does the absence of a cross-coupled pair of transistors in the SA contribute to the security of the PUF generator? 2. What are the key advantages of using a PUF generator with enhanced I/O circuits in secure authentication systems?


Original Abstract Submitted

Disclosed is an input/output circuit for a physical unclonable function generator circuit. In one embodiment, a physical unclonable function (PUF) generator includes: a PUF cell array comprising a plurality of bit cells configured in a plurality of columns and at least one row, and at least one input/output (I/O) circuit each coupled to at least two neighboring columns of the PUF cell array, wherein the at least one I/O circuit each comprises a sense amplifier (SA) with no cross-coupled pair of transistors, wherein the SA comprises two cross-coupled inverters with no access transistor and a SA enable transistor, and wherein the at least one I/O circuit each is configured to access and determine logical states of at least two bit cells in the at least two neighboring columns; and based on the determined logical states of the plurality of bit cells, to generate a PUF signature.

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