18601094. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Tetsu Ohtou of HSINCHU CITY (TW)

Ching-Wei Tsai of HSINCHU CITY (TW)

Kuan-Lun Cheng of HSINCHU CITY (TW)

Yasutoshi Okuno of HSINCHU CITY (TW)

Jiun-Jia Huang of YUNLIN COUNTY (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18601094 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

The patent application describes a device with a substrate, two fins, an isolation structure, a gate structure, source/drain epitaxy structures, and a spacer layer.

• The device includes a substrate with two fins, each having an isolation structure between them.
• A gate structure crosses the two fins, controlling the flow of current.
• Source/drain epitaxy structures are located over each fin, aiding in the transfer of charge.
• A spacer layer extends between the two fins along the top surface of the isolation structure, providing additional support.

Potential Applications: - This technology could be used in semiconductor devices for improved performance. - It may find applications in the manufacturing of advanced electronic components.

Problems Solved: - Enhances the efficiency and functionality of semiconductor devices. - Provides better control over the flow of current in electronic circuits.

Benefits: - Improved performance and reliability of electronic devices. - Enhanced functionality and precision in semiconductor applications.

Commercial Applications: - This technology could be valuable in the production of high-performance electronic devices. - It may have significant implications for the semiconductor industry, leading to more advanced and efficient products.

Questions about the technology: 1. How does the spacer layer contribute to the overall functionality of the device? 2. What are the potential implications of using source/drain epitaxy structures in this context?

Frequently Updated Research: - Stay updated on the latest advancements in semiconductor technology to understand how this innovation fits into the current landscape.

Original Abstract Submitted

A device incudes a substrate. A first fin and a second fin are over the substrate. An isolation structure is laterally between the first fin and the second fin. A gate structure crosses the first fin and the second fin. A first source/drain epitaxy structure is over the first fin. A second source/drain epitaxy structure is over the second fin. A spacer layer extends from a first sidewall of the first fin to a first sidewall of the second fin along a top surface of the isolation structure.