18600360. EFFICIENT READ DISTURB SCANNING simplified abstract (Micron Technology, Inc.)
Contents
EFFICIENT READ DISTURB SCANNING
Organization Name
Inventor(s)
Chun Sum Yeung of San Jose CA (US)
EFFICIENT READ DISTURB SCANNING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18600360 titled 'EFFICIENT READ DISTURB SCANNING
Simplified Explanation: The patent application describes methods, systems, and devices for efficient read disturb scanning in a memory system. The system limits the number of word lines scanned during a read disturb scan based on the characterization of the word lines, such as selecting those with higher bit error rates. This helps in determining whether a refresh operation is needed for the block.
- The memory system limits the quantity of word lines scanned during a read disturb scan.
- It selects a threshold quantity of word lines based on their characterization, like higher bit error rates.
- The system performs the read disturb scan on the selected word lines to determine failure bit counts.
- Unselected word lines of the block are excluded from the scan.
- A refresh operation on the block is decided based on the failure bit counts meeting a threshold.
Potential Applications: 1. Memory systems in electronic devices. 2. Data storage systems in computers. 3. Error detection and correction in memory modules.
Problems Solved: 1. Efficient read disturb scanning in memory systems. 2. Identifying word lines with higher bit error rates. 3. Optimizing refresh operations for memory blocks.
Benefits: 1. Improved memory system performance. 2. Enhanced data reliability. 3. Reduced energy consumption.
Commercial Applications: The technology can be utilized in:
- Solid-state drives (SSDs)
- Servers and data centers
- Embedded systems
Prior Art: Readers can explore prior patents related to memory system optimizations and error detection in electronic devices.
Frequently Updated Research: Stay updated on advancements in memory system efficiency and error correction techniques.
Questions about Memory System Optimization: 1. How does the memory system determine the threshold quantity of word lines for a read disturb scan? 2. What are the potential implications of not performing a refresh operation based on the failure bit counts?
Original Abstract Submitted
Methods, systems, and devices for efficient read disturb scanning are described. A memory system may limit a quantity of word lines scanned as part of a read disturb scan. For example, the memory system may select a threshold quantity of word lines of a block for the read disturb scan based on a characterization of the word lines, such as selecting one or more word lines having higher bit error rates than other word lines of the block. The memory system may perform the read disturb scan on the selected one or more word lines to determine respective failure bit counts of the selected word lines and exclude unselected word lines of the block from the read disturb scan. The memory system may determine whether to perform a refresh operation on the block based on whether a respective failure bit count satisfies a threshold failure bit count.
