18597762. SYMMETRICAL 3D BIPOLAR NANOSHEET TRANSISTOR (Tokyo Electron Limited)

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SYMMETRICAL 3D BIPOLAR NANOSHEET TRANSISTOR

Organization Name

Tokyo Electron Limited

Inventor(s)

Henry Jim Fulford of Albany NY US

Mark I. Gardner of Albany NY US

SYMMETRICAL 3D BIPOLAR NANOSHEET TRANSISTOR

This abstract first appeared for US patent application 18597762 titled 'SYMMETRICAL 3D BIPOLAR NANOSHEET TRANSISTOR

Original Abstract Submitted

Semiconductor devices and corresponding methods of manufacture are disclosed. The method includes forming vertical channel structures on a substrate. The vertical channel structures are formed within a layer stack of alternating layers of a first metal and a first dielectric. The vertical channel structures are channels of field effect transistors that have a current flow path perpendicular to a surface of the substrate. The vertical channel structures have a dielectric core. The method includes forming openings on the substrate that uncover a region of the layer stack adjacent to the vertical channel structures. The method includes, for each vertical channel structure, forming a corresponding staircase region in the layer stack, and forming metal contacts within each staircase region.