18596541. MEMORY DEVICE AND METHOD simplified abstract (Kioxia Corporation)

From WikiPatents
Jump to navigation Jump to search

MEMORY DEVICE AND METHOD

Organization Name

Kioxia Corporation

Inventor(s)

Hideki Igarashi of Yokohama Kanagawa (JP)

Takaya Izumi of Yokohama Kanagawa (JP)

MEMORY DEVICE AND METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18596541 titled 'MEMORY DEVICE AND METHOD

The memory device described in the patent application includes two strings of transistors, each connected to separate wirings and a shared third wiring.

  • The device has a circuit that performs a write operation on specific transistors in each string by applying different voltages to the wirings and transistor gates.
  • When a current flows between the first and third wirings but not the second and third wirings, the circuit applies specific voltages to the first and second wirings.

Potential Applications:

  • This technology could be used in various memory devices such as solid-state drives and computer RAM modules.
  • It could also find applications in data storage systems and high-performance computing.

Problems Solved:

  • The technology addresses the need for efficient and reliable write operations in memory devices.
  • It improves the performance and longevity of memory storage systems.

Benefits:

  • Enhanced write operation efficiency and reliability.
  • Improved performance and durability of memory devices.
  • Increased data storage capacity and speed.

Commercial Applications:

  • The technology could be valuable for companies manufacturing memory devices for consumer electronics, data centers, and cloud computing services.
  • It has the potential to drive innovation in the memory storage industry and improve the overall user experience.

Questions about the technology: 1. How does the circuit differentiate between the first and second wirings during the write operation? 2. What are the specific advantages of applying different voltages to the wirings and transistor gates in memory devices?


Original Abstract Submitted

A memory device includes first and second strings including transistors, a first wiring connected to the first string, a second wiring connected to the second string, a third wiring connected to both strings, and a circuit for executing a write operation on a first transistor of the first string and a second transistor of the second string. The operation includes a first operation by which a first voltage is applied to the wirings and a second operation by which a second voltage is applied to gates of the first and second transistors. When a current flows between the first and third wirings but does not flow between the second and third wirings in the first operation, the circuit causes a third voltage to be applied to the first wiring, and causes a fourth voltage higher than the third voltage to be applied to the second wiring in the second operation.

Retrieved from "http://wikipatents.org/index.php?title=18596541._MEMORY_DEVICE_AND_METHOD_simplified_abstract_(Kioxia_Corporation)&oldid=240966"