18595321. SEMICONDUCTOR MEMORY DEVICE simplified abstract (Kioxia Corporation)
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Kazuharu Yamabe of Yokkaichi Mie (JP)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18595321 titled 'SEMICONDUCTOR MEMORY DEVICE
Simplified Explanation:
This patent application describes a semiconductor memory device with two cell chips, each containing multiple layers and bonding pads for electrical connections. The first and second cell chips are connected through conductive layers.
- The semiconductor memory device includes two cell chips with multiple layers and bonding pads.
- The first cell chip has a first stack, a first conductive layer as a source line, a second conductive layer connected to the first layer, and multiple bonding pads.
- The second cell chip has a second stack, a third conductive layer as a source line, multiple bonding pads connected to the first cell chip's bonding pads, and a fourth conductive layer connecting the bonding pads.
- The first and fourth conductive layers are electrically connected.
Key Features and Innovation:
- Multiple layers and bonding pads in each cell chip for efficient electrical connections.
- Connection between the first and second cell chips through conductive layers for seamless operation.
Potential Applications:
- Memory devices in electronic devices such as smartphones, computers, and tablets.
- Data storage in servers and data centers.
Problems Solved:
- Efficient electrical connections between cell chips.
- Seamless operation and data transfer between the two chips.
Benefits:
- Improved performance and reliability of semiconductor memory devices.
- Enhanced data storage and retrieval capabilities.
Commercial Applications:
The technology can be used in various electronic devices and data storage systems, enhancing their performance and reliability in storing and accessing data.
Questions about Semiconductor Memory Device: 1. How does the connection between the first and second cell chips improve the performance of the memory device? 2. What are the potential challenges in implementing this technology in commercial memory devices?
Frequently Updated Research:
Stay updated on the latest advancements in semiconductor memory technology to leverage the benefits of this innovative memory device design.
Original Abstract Submitted
A semiconductor memory device includes a first cell chip and a second cell chip. The first cell chip includes a first stack, a first conductive layer that is used as a first source line, a second conductive layer that is electrically connected to the first conductive layer, and a plurality of first bonding pads. The second cell chip includes a second stack, a third conductive layer that is used as a second source line, a plurality of second bonding pads that are joined to the plurality of first bonding pads, respectively, and a fourth conductive layer that electrically couples the plurality of second bonding pads and is electrically connected to the third conductive layer. The second conductive layer and the fourth conductive layer are electrically connected.
