18595303. STORAGE DEVICE simplified abstract (Kioxia Corporation)
Contents
STORAGE DEVICE
Organization Name
Inventor(s)
Kouji Matsuo of Ama Aichi (JP)
STORAGE DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18595303 titled 'STORAGE DEVICE
The patent application describes a memory cell structure with multiple regions, including a semiconductor layer and pillars extending in different directions.
- The memory cell regions consist of a semiconductor layer and pillars with side surfaces in contact with the layer.
- A first conductor includes a portion extending in one direction and multiple portions connected to it and extending in another direction.
- Contact regions contain multiple contacts extending in a specific direction.
- Groups are arranged to include memory cell regions, conductor portions, and contact regions in a specific orientation.
Potential Applications: - This technology could be used in the development of high-density memory storage devices. - It may find applications in advanced computing systems requiring efficient memory management.
Problems Solved: - Provides a compact and efficient memory cell structure for improved data storage capabilities. - Offers a solution for organizing memory cell components in a structured and functional manner.
Benefits: - Increased memory storage capacity in a smaller footprint. - Enhanced data processing speeds and efficiency in computing systems.
Commercial Applications: Title: Innovative Memory Cell Structure for High-Density Data Storage This technology could revolutionize the memory storage industry by enabling the development of more powerful and compact devices for various applications.
Questions about the technology: 1. How does this memory cell structure compare to traditional memory storage solutions?
This memory cell structure offers a more organized and efficient design for improved data storage capabilities.
2. What are the potential implications of this technology in the field of semiconductor manufacturing?
This technology could lead to advancements in memory storage devices, enhancing their performance and capacity.
Original Abstract Submitted
A plurality of memory cell regions includes a semiconductor layer extending in a first direction and a pillar having a side surface in contact with the semiconductor layer and extending in a second direction. A first conductor includes a first portion extending in the first direction and a plurality of second portions extending in a third direction and connected to the first portion. One of the second portions is in contact with the semiconductor layer. Each of a plurality of contact regions includes a plurality of contacts extending in the second direction. A plurality of groups is arranged in the first direction when viewed in the second direction, each of the groups including one of the plurality of memory cell regions, one of the plurality of second portions, and one of the plurality of contact regions, which are arranged in the first direction when viewed in the second direction.
