18593215. MEMORY SYSTEM simplified abstract (Kioxia Corporation)
Contents
MEMORY SYSTEM
Organization Name
Inventor(s)
Takashi Takemoto of Yokohama Kanagawa (JP)
Kensaku Yamaguchi of Kawasaki Kanagawa (JP)
Keiri Nakanishi of Kawasaki Kanagawa (JP)
Kohei Oikawa of Kawasaki Kanagawa (JP)
Sho Kodama of Yokohama Kanagawa (JP)
MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18593215 titled 'MEMORY SYSTEM
The memory system described in the patent application consists of a nonvolatile memory and a controller. The controller maintains an address mapping table that links logical addresses to physical addresses of the nonvolatile memory in units of physical regions with a predetermined size.
- During a write operation, the controller compresses write data of the predetermined size into compressed write data.
- It then determines a physical address range where the compressed write data will be written.
- The controller writes the compressed write data into the physical address range and also includes second mapping information in one or more physical regions spanned by the range.
- The address mapping table is updated with the new information, including the logical address of the write data, an offset specification, and the size of the compressed write data.
Potential Applications: - Data storage systems - Embedded systems - Solid-state drives
Problems Solved: - Efficient data compression and storage - Improved write operation performance - Enhanced memory management
Benefits: - Increased data storage capacity - Faster write operations - Optimized memory usage
Commercial Applications: Title: "Advanced Memory System for Enhanced Data Storage" This technology can be utilized in various commercial applications such as: - Consumer electronics - Cloud storage services - Industrial automation systems
Questions about the technology: 1. How does the controller compress the write data during a write operation? 2. What are the specific benefits of using the address mapping table in the memory system?
Frequently Updated Research: Stay updated on the latest advancements in memory systems, data compression techniques, and memory management technologies to enhance the efficiency and performance of storage systems.
Original Abstract Submitted
A memory system includes a nonvolatile memory and a controller. The controller is configured to maintain an address mapping table including first mapping information indicating correspondence between logical addresses and physical addresses of the nonvolatile memory in units of physical regions each having a predetermined size. The controller, during a write operation compresses write data of the predetermined size into a compressed write data, determines a physical address range in which the compressed write data is to be written, writes the compressed write data into the physical address range and also second mapping information into an area in one or more physical regions spanned by the physical address range, and updates the address mapping table. The second mapping information indicates a logical address of the write data, an information capable of specifying an offset, and a size of the compressed write data.
