18590836. SEMICONDUCTOR MEMORY DEVICE simplified abstract (Kioxia Corporation)
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Yuki Inuzuka of Yokohama Kanagawa (JP)
Hidehiro Shiga of Yokohama Kanagawa (JP)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18590836 titled 'SEMICONDUCTOR MEMORY DEVICE
The semiconductor memory device described in the patent application consists of first and second semiconductor pillars, with first and second strings of memory cells connected in series on opposite sides of each pillar. During an erasing operation, different voltages are supplied to the first and second word lines by a driver to erase data in specific memory cells.
- First and second semiconductor pillars
- First and second strings of memory cells connected in series on opposite sides of each pillar
- Different voltages supplied to first and second word lines during erasing operation
- Erasing operation targets specific memory cells
- Driver supplies higher voltage to first word lines and reference voltage to second word lines
Potential Applications: - Semiconductor memory devices - Data storage systems - Electronic devices requiring memory functions
Problems Solved: - Efficient erasing of data in specific memory cells - Improved performance of semiconductor memory devices
Benefits: - Enhanced data management capabilities - Increased efficiency in data erasing operations - Improved overall performance of electronic devices
Commercial Applications: Title: Advanced Semiconductor Memory Devices for Enhanced Data Management This technology can be utilized in various electronic devices such as smartphones, tablets, and computers to improve data storage and management capabilities. The market implications include faster data processing speeds and enhanced memory functions, leading to better overall device performance.
Questions about the technology: 1. How does the driver in the semiconductor memory device determine the voltages supplied to the word lines during an erasing operation? 2. What are the specific advantages of having memory cells connected in series on opposite sides of semiconductor pillars in terms of data management and storage efficiency?
Original Abstract Submitted
A semiconductor memory device includes first and second semiconductor pillars, a first string including first memory cells connected in series and a second string including second memory cells connected in series on opposite sides of the first semiconductor pillar, respectively, a third string including third memory cells connected in series and a fourth string including fourth memory cells connected in series, on opposite sides of the second semiconductor pillar, respectively, first word lines, second word lines, and a driver configured to supply different voltages to the first and second word lines during an erasing operation to erase data in the second and fourth memory cells. In the erasing operation, the driver supplies a first voltage higher than a reference voltage to the first word lines, and supplies the reference voltage to the second word lines.
