18586735. METAL OXIDE INTERLAYER STRUCTURE FOR NFET AND PFET simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

METAL OXIDE INTERLAYER STRUCTURE FOR NFET AND PFET

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Min Cao of Hsinchu (TW)

Pei-Yu Wang of Hsinchu City (TW)

Sai-Hooi Yeong of Hsinchu County (TW)

Ching-Wei Tsai of Hsinchu City (TW)

Kuan-Lun Cheng of Hsinchu (TW)

Chih-Hao Wang of Hsinchu County (TW)

METAL OXIDE INTERLAYER STRUCTURE FOR NFET AND PFET - A simplified explanation of the abstract

This abstract first appeared for US patent application 18586735 titled 'METAL OXIDE INTERLAYER STRUCTURE FOR NFET AND PFET

The present disclosure describes a method for forming a semiconductor device with both nFET and pFET structures, each including a semiconductor substrate and a gate trench. The method involves depositing an interfacial layer in each gate trench, followed by depositing a first ferroelectric layer, removing it from the nFET structure, depositing a metal oxide layer, depositing a second ferroelectric layer, removing it from the pFET structure, and finally depositing a gate electrode in each gate trench.

• Deposit interfacial layer in gate trench
• Deposit first ferroelectric layer
• Remove first ferroelectric layer from nFET structure
• Deposit metal oxide layer
• Deposit second ferroelectric layer
• Remove second ferroelectric layer from pFET structure
• Deposit gate electrode in each gate trench

Potential Applications: - Semiconductor manufacturing - Integrated circuits - Electronics industry

Problems Solved: - Enhancing performance of semiconductor devices - Improving efficiency of nFET and pFET structures

Benefits: - Increased functionality of semiconductor devices - Enhanced reliability and durability - Improved overall performance

Commercial Applications: Title: Advanced Semiconductor Device Manufacturing Process This technology could be utilized in the production of high-performance electronic devices, leading to advancements in various industries such as telecommunications, computing, and consumer electronics.

Prior Art: Readers can explore prior research on ferroelectric materials in semiconductor devices and gate electrode fabrication techniques to gain a deeper understanding of the technology.

Frequently Updated Research: Researchers are continually investigating new materials and methods to further enhance the performance and efficiency of semiconductor devices using ferroelectric layers and metal oxide materials.

Questions about Semiconductor Device Manufacturing: 1. How does the use of ferroelectric layers impact the performance of nFET and pFET structures? 2. What are the potential challenges in implementing this method on an industrial scale?

Original Abstract Submitted

The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench, depositing a first ferroelectric layer over the interfacial layer, removing the first ferroelectric layer from the nFET structure, depositing a metal oxide layer in each gate trench, depositing a second ferroelectric layer over the metal oxide layer, removing the second ferroelectric layer from the pFET structure, and depositing a gate electrode in each gate trench.