18585643. MEMORY CONTROLLER AND CONTROL METHOD THEREFOR simplified abstract (CANON KABUSHIKI KAISHA)
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MEMORY CONTROLLER AND CONTROL METHOD THEREFOR
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MEMORY CONTROLLER AND CONTROL METHOD THEREFOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 18585643 titled 'MEMORY CONTROLLER AND CONTROL METHOD THEREFOR
The memory controller described in the patent application manages memory accesses to a memory operating with a first clock, generating command requests and determining the issuance of commands based on set timing constraints.
- The memory controller holds multiple memory accesses and generates command requests for the memory operation.
- It checks if commands corresponding to the requests can be issued based on timing constraints set for each command.
- With a lower frequency second clock, it selects an issuable command to be sent to the memory.
- The selected command is then outputted to the memory in synchronization with the first clock.
Potential Applications: - This technology can be applied in various computing systems requiring efficient memory access management. - It can enhance the performance of data processing applications that heavily rely on memory operations.
Problems Solved: - Efficient management of memory accesses and command issuance. - Optimization of memory operations based on timing constraints.
Benefits: - Improved memory access efficiency. - Enhanced overall system performance. - Reduction in memory access latency.
Commercial Applications: Title: Advanced Memory Controller Technology for Enhanced System Performance This technology can be utilized in servers, data centers, and high-performance computing systems to optimize memory operations and improve overall system efficiency.
Questions about Memory Controller Technology: 1. How does the memory controller determine which command to issue to the memory? The memory controller selects an issuable command based on timing constraints set for each command request. 2. What are the potential benefits of using this memory controller technology in data centers? Using this technology in data centers can lead to improved memory access efficiency, reduced latency, and enhanced overall system performance.
Original Abstract Submitted
A memory controller comprises a holding unit that holds a plurality of memory accesses to a memory that operates with a first clock. The memory controller generates a plurality of command requests for causing the memory to operate based on the plurality of memory accesses; determines, in synchronization with a second clock having a lower frequency than the first clock, whether a plurality of commands corresponding to the plurality of command requests are issuable, based on a constraint on issuance timings that are respectively set for the plurality of commands; selects, in synchronization with the second clock, one command to be issued to the memory from among commands that have been determined by the determining unit to be issuable; and outputs the selected one command to the memory in synchronization with the first clock.
