18585372. Integrated Assemblies and Methods of Forming Integrated Assemblies simplified abstract (Micron Technology, Inc.)
Contents
Integrated Assemblies and Methods of Forming Integrated Assemblies
Organization Name
Inventor(s)
Alyssa N. Scarbrough of Boise ID (US)
John D. Hopkins of Meridian ID (US)
Jordan D. Greenlee of Boise ID (US)
Integrated Assemblies and Methods of Forming Integrated Assemblies - A simplified explanation of the abstract
This abstract first appeared for US patent application 18585372 titled 'Integrated Assemblies and Methods of Forming Integrated Assemblies
The integrated assembly described in the patent application consists of memory regions, channel-material pillars, conductive posts, an intermediate region, a panel, doped semiconductor material, insulative rings, and insulative liners.
- Memory regions and an intermediate region are present in the integrated assembly.
- Channel-material pillars are arranged within the memory regions.
- Conductive posts are arranged within the intermediate region.
- A panel extends across the memory regions and the intermediate region.
- Doped semiconductor material is within the memory regions and the intermediate region.
- Insulative rings surround lower regions of the conductive posts.
- Insulative liners are along upper regions of the conductive posts.
Potential Applications: - This technology could be used in the development of advanced memory storage devices. - It may find applications in the semiconductor industry for improving memory performance.
Problems Solved: - Enhances the efficiency and performance of memory storage devices. - Provides a more compact and integrated solution for memory systems.
Benefits: - Improved memory storage capabilities. - Enhanced performance and reliability of memory devices. - Compact and integrated design for space-saving solutions.
Commercial Applications: Title: Advanced Memory Storage Technology for Semiconductor Industry This technology could be utilized in the production of high-performance memory devices for consumer electronics, data centers, and other computing applications. The compact design and improved performance could make it a valuable asset in the semiconductor market.
Questions about the Technology: 1. How does the integration of memory regions and conductive posts improve memory device performance? 2. What are the potential cost-saving benefits of implementing this technology in memory storage systems?
Original Abstract Submitted
Some embodiments include an integrated assembly having a first memory region, a second memory region offset from the first memory region, and an intermediate region between the first and second memory regions. Channel-material-pillars are arranged within the memory regions. Conductive posts are arranged within the intermediate region. A panel extends across the memory regions and the intermediate region. The panel is laterally between a first memory-block-region and a second memory-block-region. Doped-semiconductor-material is within the memory regions and the intermediate region, and is directly adjacent to the panel. The doped-semiconductor-material is at least part of conductive source structures within the memory regions. Insulative rings laterally surround lower regions of the conductive posts and are between the conductive posts and the doped-semiconductor-material. Insulative liners are along upper regions of the conductive posts. Some embodiments include methods of forming integrated assemblies.
