18558740. PREPARATION METHOD FOR ARRAY SUBSTRATE AND PREPARATION METHOD FOR DISPLAY PANEL simplified abstract (BOE TECHNOLOGY GROUP CO., LTD.)
Contents
PREPARATION METHOD FOR ARRAY SUBSTRATE AND PREPARATION METHOD FOR DISPLAY PANEL
Organization Name
BOE TECHNOLOGY GROUP CO., LTD.
Inventor(s)
PREPARATION METHOD FOR ARRAY SUBSTRATE AND PREPARATION METHOD FOR DISPLAY PANEL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18558740 titled 'PREPARATION METHOD FOR ARRAY SUBSTRATE AND PREPARATION METHOD FOR DISPLAY PANEL
The preparation method for an array substrate involves forming conductive and insulating layers on a substrate, creating sub-vias, etching insulating layers to form vias, and adding connection electrodes.
- Formation of conductive and insulating layers on a substrate
- Creation of sub-vias through a one-time patterning process
- Etching insulating layers to form vias
- Addition of connection electrodes on the insulating layers
- Sequential formation of insulating layers to create a structured array substrate
Potential Applications: - Display technologies - Semiconductor manufacturing - Printed circuit boards
Problems Solved: - Enhancing electrical connectivity in array substrates - Improving the efficiency of electronic devices - Facilitating the production of complex circuitry
Benefits: - Increased reliability of electronic components - Enhanced performance of display screens - Cost-effective manufacturing processes
Commercial Applications: Title: Advanced Array Substrate Preparation Method for Electronics Industry This technology can be utilized in the production of various electronic devices, such as smartphones, tablets, and televisions, to improve their performance and reliability. The method offers a more efficient way to create complex circuitry, leading to cost savings and enhanced product quality.
Questions about Array Substrate Preparation Method: 1. How does this method compare to traditional array substrate preparation techniques? 2. What are the specific advantages of using sub-vias in the fabrication process?
Frequently Updated Research: Researchers are continually exploring new materials and processes to further enhance the efficiency and performance of array substrates in electronic devices. Stay updated on the latest advancements in this field to leverage the full potential of this technology.
Original Abstract Submitted
Disclosed is a preparation method for an array substrate including: forming a first conductive portion on a substrate; sequentially forming a first insulating layer, a second insulating layer and a third insulating layer on the side of the first conductive portion that faces away from the substrate; forming, through one-time patterning process, a first sub-via that penetrates through the third insulating layer, the second insulating layer and a first part of the first insulating layer; forming a fourth insulating layer on the side of the third insulating layer that faces away from the substrate; etching and removing the fourth insulating layer and the first insulating layer of the second thickness that are at the first sub-via, so as to form a first via; and forming a first connection electrode on the side of the fourth insulating layer that faces away from the substrate.
