18537108. DETERIORATION INHIBITING CIRCUIT simplified abstract (TOYOTA JIDOSHA KABUSHIKI KAISHA)
Contents
DETERIORATION INHIBITING CIRCUIT
Organization Name
TOYOTA JIDOSHA KABUSHIKI KAISHA
Inventor(s)
Takasuke Ito of Nisshin-shi (JP)
Shigeki Otsuka of Nisshin-shi (JP)
Yoshikazu Furuta of Nisshin-shi (JP)
Tomohiro Nezuka of Nisshin-shi (JP)
DETERIORATION INHIBITING CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18537108 titled 'DETERIORATION INHIBITING CIRCUIT
Simplified Explanation:
The patent application describes a circuit that inhibits deterioration in transistors by switching voltages applied to their gates.
- The circuit includes a switchover circuit that controls the voltages applied to the gates of the transistors.
- The switchover circuit switches between two states, applying different voltages to each transistor in each state.
- The first voltage applied is higher than an intermediate voltage, while the second voltage is lower than the intermediate voltage.
Key Features and Innovation:
- Switchover circuit inhibits deterioration in transistors.
- Different voltages applied to gates of transistors in different states.
- Higher and lower voltages used to prevent characteristic deterioration.
Potential Applications:
- Integrated circuits
- Electronic devices
- Semiconductor technology
Problems Solved:
- Preventing deterioration in transistors
- Maintaining performance of differential pair circuits
Benefits:
- Extended lifespan of transistors
- Improved performance of circuits
- Enhanced reliability of electronic devices
Commercial Applications:
The technology could be used in the development of advanced electronic devices, improving their performance and reliability. It has potential applications in various industries, including telecommunications, consumer electronics, and automotive.
Questions about the Technology:
1. How does the switchover circuit prevent deterioration in the transistors? 2. What are the specific advantages of using different voltages in the circuit?
Original Abstract Submitted
A deterioration inhibiting circuit includes a switchover circuit that inhibits characteristic deterioration of first and second transistors included in a differential pair circuit having first and second input terminals. A gate of the first transistor is connected to the first input terminal, and a gate of the second transistor is connected to the second input terminal. The switchover circuit executes switchover between a first state and a second state. In the first state, a first voltage is applied to the gate of the first transistor and a second voltage is applied to the gate of the second transistor. In the second state, the second voltage is applied to the gate of the first transistor and the first voltage is applied to the gate of the second transistor. the first voltage is higher than an intermediate voltage, and the second voltage is lower than the intermediate voltage.
