18532496. METHOD OF ANALYZING ELECTROSTATIC DISCHARGE NETWORK USING COMMON RESISTANCE REMOVAL, SYSTEM PERFORMING THE SAME AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
METHOD OF ANALYZING ELECTROSTATIC DISCHARGE NETWORK USING COMMON RESISTANCE REMOVAL, SYSTEM PERFORMING THE SAME AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
Organization Name
Inventor(s)
Jordan Timothy Davis of Suwon-si (KR)
METHOD OF ANALYZING ELECTROSTATIC DISCHARGE NETWORK USING COMMON RESISTANCE REMOVAL, SYSTEM PERFORMING THE SAME AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18532496 titled 'METHOD OF ANALYZING ELECTROSTATIC DISCHARGE NETWORK USING COMMON RESISTANCE REMOVAL, SYSTEM PERFORMING THE SAME AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
Abstract: The method involves analyzing an electrostatic discharge (ESD) network in a semiconductor device by calculating the common resistance of the ESD protection circuit and performing a network analysis excluding this resistance.
- Key Features and Innovation:
- Receiving input data characterizing a semiconductor device with an I/O pad, ESD protection circuit, and functional circuit.
- Calculating the common resistance of the ESD protection circuit using a plurality of resistances and predetermined equations.
- Performing a network analysis on the semiconductor device while excluding the common resistance.
Potential Applications: This technology can be applied in the semiconductor industry for optimizing ESD protection circuits in devices to enhance reliability and performance.
Problems Solved: This method addresses the need for accurate analysis of ESD networks in semiconductor devices to ensure proper protection against electrostatic discharge events.
Benefits:
- Improved reliability of semiconductor devices.
- Enhanced performance of ESD protection circuits.
- Cost-effective optimization of ESD network designs.
Commercial Applications: Optimizing ESD protection circuits in semiconductor devices for various industries such as consumer electronics, automotive, and telecommunications.
Prior Art: Researchers can explore prior studies on ESD protection circuits and network analysis in semiconductor devices to understand the evolution of this technology.
Frequently Updated Research: Researchers are continually studying new methods and technologies to enhance ESD protection in semiconductor devices, leading to advancements in network analysis techniques.
Questions about ESD Network Analysis: 1. How does the common resistance calculation impact the overall performance of the ESD protection circuit? 2. What are the potential challenges in implementing network analysis excluding the common resistance in semiconductor devices?
Original Abstract Submitted
In an example method of analyzing an electrostatic discharge (ESD) network, input data characterizing a semiconductor device is received. The semiconductor device includes an input/output (I/O) pad, an ESD protection circuit, and at least one functional circuit. A common resistance of the ESD protection circuit is calculated based on the input data and using a plurality of resistances and at least one predetermined equation. The plurality of resistances are associated with the I/O pad, the ESD protection circuit, and the at least one functional circuit. A network analysis is performed on the semiconductor device by excluding the common resistance.
