18522776. METHOD FOR SUPPORTING CACHE COHERENCY BASED ON VIRTUAL ADDRESSES FOR ARTIFICIAL INTELLIGENCE PROCESSOR HAVING LARGE ON-CHIP MEMORY AND APPARATUS FOR THE SAME simplified abstract (ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE)
METHOD FOR SUPPORTING CACHE COHERENCY BASED ON VIRTUAL ADDRESSES FOR ARTIFICIAL INTELLIGENCE PROCESSOR HAVING LARGE ON-CHIP MEMORY AND APPARATUS FOR THE SAME
Organization Name
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Inventor(s)
METHOD FOR SUPPORTING CACHE COHERENCY BASED ON VIRTUAL ADDRESSES FOR ARTIFICIAL INTELLIGENCE PROCESSOR HAVING LARGE ON-CHIP MEMORY AND APPARATUS FOR THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18522776 titled 'METHOD FOR SUPPORTING CACHE COHERENCY BASED ON VIRTUAL ADDRESSES FOR ARTIFICIAL INTELLIGENCE PROCESSOR HAVING LARGE ON-CHIP MEMORY AND APPARATUS FOR THE SAME
The abstract describes a method for supporting cache coherency based on virtual addresses for an artificial intelligence processor with large on-chip memory.
- Setting external memory address areas that do not overlap for multiple caches in an artificial intelligence processor.
- Providing virtual addresses for multiple processor cores to access the multiple caches.
Potential Applications: This technology can be applied in artificial intelligence processors, machine learning systems, and other high-performance computing devices.
Problems Solved: This method addresses the challenge of maintaining cache coherency in systems with large on-chip memory and multiple processor cores.
Benefits: Improved performance and efficiency in artificial intelligence processing tasks. Enhanced data access and retrieval speeds. Reduced latency in cache operations.
Commercial Applications: This innovation can be utilized in data centers, autonomous vehicles, robotics, and other AI-driven applications to optimize processing capabilities and enhance overall performance.
Prior Art: Researchers can explore prior art related to cache coherency mechanisms in multi-core processors and memory management systems.
Frequently Updated Research: Stay informed about advancements in cache coherency techniques, virtual memory management, and artificial intelligence processor architectures for cutting-edge applications.
Questions about Cache Coherency Based on Virtual Addresses: 1. How does this method improve cache coherency in artificial intelligence processors? 2. What are the key advantages of using virtual addresses for accessing multiple caches in a processor?
Original Abstract Submitted
Disclosed herein are a method for supporting cache coherency based on virtual addresses for an artificial intelligence processor having large on-chip memory and an apparatus for the same. The method for supporting cache coherency according to an embodiment of the present disclosure includes, by an artificial intelligence processor including multiple processor cores and multiple caches, setting external memory address areas which do not overlap each other for respective multiple caches; and providing virtual addresses with which the multiple processor cores access the multiple caches.
