18519458. ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION simplified abstract (Micron Technology, Inc.)
Contents
- 1 ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION
Organization Name
Inventor(s)
Nitul Gohain of Bangalore (IN)
Jonathan S. Parry of Boise ID (US)
ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18519458 titled 'ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION
Simplified Explanation
The patent application describes methods, systems, and devices to enhance read performance for memory data word decoding using power allocation based on error pattern detection in both QLC and TLC products.
- A plurality of data words is processed using a first decoder engine of a memory device according to a first power setting.
- The decoder detects a pattern of errors in the data words and communicates a status signal based on this detection.
- A resource manager allocates a second amount of power credits to the decoder based on the status signal.
- The decoder processes a portion of the data words using a second decoder engine according to the second amount of power credits.
Potential Applications
This technology could be applied in various memory devices such as solid-state drives, smartphones, tablets, and other electronic devices requiring efficient memory data word decoding.
Problems Solved
1. Improved read performance for memory data word decoding. 2. Efficient power allocation based on error pattern detection.
Benefits
1. Enhanced reliability and accuracy in decoding data words. 2. Optimal power usage leading to improved overall device performance.
Potential Commercial Applications
Optimized memory devices for consumer electronics, data centers, and other industries requiring high-performance memory solutions.
Possible Prior Art
One possible prior art could be the use of error correction codes in memory devices to improve data decoding accuracy and reliability.
What is the impact of this technology on memory devices in terms of power efficiency and read performance?
This technology significantly improves power efficiency by allocating power credits based on error pattern detection, leading to optimized read performance in memory devices.
How does this innovation compare to existing methods of power allocation and error detection in memory devices?
This innovation stands out by combining error pattern detection with power allocation to enhance read performance, providing a more efficient and reliable solution compared to traditional methods.
Original Abstract Submitted
Methods, systems, and devices to enhance read performance for memory data word decoding using power allocation based on error pattern detection in both QLC and TLC in both QLC and TLC products are described. A plurality of data words may be processed using a first decoder engine of a decoder of a memory device according to a first power setting. The decoder may detect a pattern of errors in the plurality of data words. The decoder may further communicate a status signal based on detecting the pattern of errors. The resource manager may allocate based on the status signal, a second amount of power credits to the decoder. The decoder may process a portion of the plurality of data words using a second decoder engine according to the second amount of power credits.
