18518794. FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Chin-Hua Wang of New Taipei City (TW)

Shin-Puu Jeng of Po-Shan Village (TW)

Po-Yao Lin of Zhudong Township (TW)

Po-Chen Lai of Hsinchu County (TW)

Shu-Shen Yeh of Taoyuan City (TW)

Ming-Chih Yew of Hsinchu City (TW)

Yu-Sheng Lin of Zhubei City (TW)

FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18518794 titled 'FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE

Simplified Explanation

The method involves bonding connectors to a semiconductor wafer, dicing the wafer to form semiconductor dies, and mounting the dies on an interposer substrate with an encapsulating layer.

• Bonding connectors to a semiconductor wafer
• Dicing the wafer to form semiconductor dies
• Mounting the dies on an interposer substrate
• Applying an encapsulating layer over the substrate
• Tapered contours on the sidewalls of the dies to define specific distances

Potential Applications

• Semiconductor packaging
• Microelectronics manufacturing
• Integrated circuit assembly

Problems Solved

• Ensuring proper alignment of semiconductor dies
• Improving thermal dissipation in chip packages
• Enhancing overall reliability of electronic devices

Benefits

• Reduced top die-to-die distance
• Enhanced electrical performance
• Increased chip density and functionality

Original Abstract Submitted

A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.