18518716. METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Contents
METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Sai-Hooi Yeong of Hsinchu (TW)
METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18518716 titled 'METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE
Simplified Explanation
The abstract describes a method for writing to a ferroelectric field-effect transistor (FeFET) configured as a 2-bit storage device. The method involves setting the second bit to a logical 1 value by applying a gate voltage to the gate terminal and a first source/drain voltage to the second S/D terminal, where the first source/drain voltage is lower than the gate voltage.
- Explanation of the patent/innovation:
- The patent describes a method for writing data to a FeFET configured as a 2-bit storage device. - The method involves setting the second bit to a logical 1 value by applying specific voltages to the gate and source/drain terminals. - This technology allows for efficient storage of two bits of data in a single FeFET device.
- Potential applications of this technology:
- Non-volatile memory devices - Low-power electronics - Data storage in IoT devices
- Problems solved by this technology:
- Efficient storage of two bits in a single FeFET device - Reduced power consumption in memory devices - Improved data retention in non-volatile memory applications
- Benefits of this technology:
- Higher data density in memory devices - Lower power consumption - Enhanced reliability and durability of data storage
- Potential commercial applications of this technology:
- Memory chips for consumer electronics - IoT devices - Data storage solutions for industrial applications
- Possible prior art:
- Previous methods of writing data to FeFET devices - Research on multi-bit storage in memory devices
Questions:
1. How does this method compare to existing techniques for writing data to FeFET devices? 2. What are the specific voltage levels required for setting the second bit to a logical 1 value in this method?
Original Abstract Submitted
A method (of writing to a ferroelectric field-effect transistor (FeFET) configured as a 2-bit storage device that stores two bits, wherein the FeFET includes a first source/drain (S/D) terminal, a second S/D terminal, a gate terminal and a ferroelectric layer, a second bit being at a first end of the ferroelectric layer, the first end being proximal to the first S/D terminal) includes: setting the second bit to a logical 1 value, the setting a second bit including applying a gate voltage to the gate terminal, and applying a first source/drain voltage to the second S/D terminal; and wherein the first source/drain voltage is lower than the gate voltage.
