18518190. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Jiun Shiung Wu of Pingtung County (TW)

Guan-Jie Shen of Hsinchu City (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18518190 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The abstract describes a method of manufacturing a semiconductor device involving the formation of a fin structure with specific trimming and isolation insulating layer techniques, followed by the replacement of a dummy gate structure with a metal gate structure.

  • Fin structure with bottom and upper parts is formed over a substrate
  • Trimming of bottom part to reduce width of uppermost portion
  • Trimming of bottom end corners of upper part to reduce width at bottom
  • Formation of isolation insulating layer to allow upper part to protrude
  • Creation of dummy gate structure and source/drain structure
  • Formation of interlayer dielectric layer over structures
  • Replacement of dummy gate structure with metal gate structure

Potential Applications

  • Advanced semiconductor manufacturing processes
  • High-performance electronic devices
  • Improved efficiency and performance in integrated circuits

Problems Solved

  • Enhancing semiconductor device performance
  • Increasing transistor density
  • Improving gate control in semiconductor devices

Benefits

  • Enhanced device performance and efficiency
  • Increased functionality in electronic devices
  • Improved reliability and longevity of semiconductor devices


Original Abstract Submitted

In a method of manufacturing a semiconductor device, a fin structure having a bottom part and an upper part on the bottom part is formed over a substrate. The bottom part is trimmed so that a width of an uppermost portion of the bottom part is smaller than a width of the upper part. Bottom end corners of the upper part are trimmed to reduce a width of the upper part at a bottom of the upper part. An isolation insulating layer is formed so that the upper part protrudes from the isolation insulating layer. A dummy gate structure is formed. A source/drain structure is formed. An interlayer dielectric layer is formed over the dummy gate structure and the source/drain structure. The dummy gate structure is replaced with a metal gate structure.