18518131. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Cheng-Yi Peng of Taipei City (TW)

Chih Chieh Yeh of Taipei City (TW)

Chih-Sheng Chang of Hsinchu (TW)

Hung-Li Chiang of Taipei City (TW)

Hung-Ming Chen of Zhubei City (TW)

Yee-Chia Yeo of Hsinchu City (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18518131 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The semiconductor device described in the patent application comprises a fin structure, a gate structure, a source/drain structure, an interlayer dielectric layer, a contact hole, and a contact material.

  • The fin structure is positioned over a substrate and includes an upper layer exposed from an isolation insulating layer.
  • The gate structure is located over part of the fin structure and extends in a direction perpendicular to the fin structure.
  • The source/drain structure includes a portion of the fin structure not covered by the gate structure.
  • An interlayer dielectric layer is formed over the fin structure, gate structure, and source/drain structure.
  • A contact hole is present in the interlayer dielectric layer.
  • The contact material in the contact hole consists of a silicon phosphide layer and a metal layer.

Potential Applications

  • Advanced semiconductor devices
  • High-performance electronics
  • Integrated circuits

Problems Solved

  • Enhanced device performance
  • Improved contact resistance
  • Increased device reliability

Benefits

  • Higher efficiency
  • Better conductivity
  • Enhanced overall device functionality


Original Abstract Submitted

A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.

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