18513349. BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Yen-Hung Lin of Hsinchu City (TW)

Yuan-Te Hou of Hsinchu City (TW)

Chung-Hsing Wang of Hsinchu County (TW)

BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18513349 titled 'BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS

Simplified Explanation

The abstract describes a method for partitioning a group of power-ground (PG) cells on a substrate by aligning power strips of out-boundary and in-boundary PG cells with corresponding power rails on the substrate.

  • Placing at least one out-boundary PG cell on the substrate with aligned power strips and power rails.
  • Placing at least one in-boundary PG cell on the substrate with aligned power strips and power rails.

Potential Applications

This technology could be applied in the semiconductor industry for designing integrated circuits with optimized power distribution.

Problems Solved

1. Efficient partitioning of PG cells on a substrate. 2. Improved alignment of power strips with power rails for better power distribution.

Benefits

1. Enhanced power distribution efficiency. 2. Simplified design process for integrated circuits. 3. Potential for cost savings in manufacturing processes.


Original Abstract Submitted

A partitioning method for partitioning a group of power-ground (PG) cells is disclosed. The method includes: placing at least one out-boundary PG cell on a substrate, wherein power strips of the at least one out-boundary PG cell are aligned with corresponding power rails on the substrate; and placing at least one in-boundary PG cell on the substrate, wherein power strips of the at least one in-boundary PG cell are aligned with corresponding power rails on the substrate.

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