18504362. APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION simplified abstract (Micron Technology, Inc.)
Contents
- 1 APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION
Organization Name
Inventor(s)
Sujeet Ayyapureddi of Boise ID (US)
Scott E. Smith of Boise ID (US)
APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18504362 titled 'APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION
Simplified Explanation
The patent application describes a memory array divided into column planes and an extra column plane, with separate write enable signals for data, metadata, and parity information.
- Memory array divided into column planes and an extra column plane
- Separate write enable signals for data, metadata, and parity information
- Extra column plane includes separate write enable signals to activate different portions of the bit lines
- Example access operation involves providing a column select signal to the extra column plane along with one of the write enable signals to activate specific bit lines for data transfer
Potential Applications
This technology could be applied in:
- Memory storage devices
- Data centers
- Embedded systems
Problems Solved
- Efficient organization and storage of data, metadata, and parity information
- Simplified access operations for reading and writing data
- Improved data integrity and reliability
Benefits
- Enhanced data management capabilities
- Increased system performance
- Reduced power consumption
Potential Commercial Applications
Optimized Memory Array Organization for Enhanced Data Management
Possible Prior Art
No prior art information is available at this time.
Unanswered Questions
How does this technology impact overall system performance?
The technology's impact on system performance in terms of speed, efficiency, and reliability is not explicitly discussed in the abstract.
What are the potential limitations or drawbacks of implementing this technology?
The abstract does not mention any potential limitations or drawbacks of implementing separate write enable signals for data, metadata, and parity information in a memory array.
Original Abstract Submitted
Apparatuses, systems, and methods for separate write enable signals for data, metadata, and parity information. A memory array is divided into column planes and an extra column plane. In some modes of the memory device, data and parity information is stored in the column planes and metadata is stored in the extra column plane. The extra column plane includes separate write enable signals (or separate states of a single signal) which activate different portions of the bit lines (e.g., even and odd bit lines). In an example access operation, a column select signal is provided to the extra column plane along with one or the other write enable signals such that fewer than all of the bit lines activated by the column select signal provide data.
