18502389. SOLDER BASED HYBRID BONDING FOR FINE PITCH AND THIN BLT INTERCONNECTION simplified abstract (Micron Technology, Inc.)

From WikiPatents
Jump to navigation Jump to search

SOLDER BASED HYBRID BONDING FOR FINE PITCH AND THIN BLT INTERCONNECTION

Organization Name

Micron Technology, Inc.

Inventor(s)

Wei Zhou of Boise ID (US)

SOLDER BASED HYBRID BONDING FOR FINE PITCH AND THIN BLT INTERCONNECTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18502389 titled 'SOLDER BASED HYBRID BONDING FOR FINE PITCH AND THIN BLT INTERCONNECTION

Simplified Explanation

The semiconductor device assembly described in the abstract includes two semiconductor devices bonded together using solder bumps and polymer layers. Here are the key points of the innovation:

  • First semiconductor device with solder bumps on frontside surface
  • Second semiconductor device with TSVs protruding from backside surface
  • Polymer layers on both devices, with openings in second polymer layer for TSVs
  • Solder bumps extend into openings and contact TSVs during bonding

Potential Applications:

  • Advanced semiconductor packaging
  • Microelectronics manufacturing
  • High-performance computing

Problems Solved:

  • Improved interconnection between semiconductor devices
  • Enhanced reliability and performance of electronic systems

Benefits:

  • Increased efficiency in data transfer
  • Higher density of connections
  • Enhanced overall system performance


Original Abstract Submitted

A semiconductor device assembly, comprising a first semiconductor device including a first substrate with a frontside surface, a plurality of solder bumps located on the frontside surface of the first substrate, and a first polymer layer on the frontside surface. The semiconductor device assembly also comprises a second semiconductor device including a second substrate with a backside surface, a plurality of TSVs protruding from the backside surface of the second substrate, and a second polymer layer on the backside surface of the first substrate, the second polymer layer having a plurality of openings corresponding to the plurality of TSVs. The first and second semiconductor devices are bonded such that the first polymer layer contacts the second polymer layer and each of the plurality of solder bumps extends into a corresponding one of the plurality of openings and contacts a corresponding one of the plurality of TSVs.