18501873. SELECTABLE MEMORY SYSTEM ERASE FUNCTION simplified abstract (Micron Technology, Inc.)

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SELECTABLE MEMORY SYSTEM ERASE FUNCTION

Organization Name

Micron Technology, Inc.

Inventor(s)

Frank F. Ross of Boise ID (US)

SELECTABLE MEMORY SYSTEM ERASE FUNCTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18501873 titled 'SELECTABLE MEMORY SYSTEM ERASE FUNCTION

Simplified Explanation

The patent application describes methods, systems, and devices for a selectable memory system erase function in a multitenancy memory system. Here are the key points:

  • User requests to vacate memory system
  • Multitenancy controller sends erase data indication to memory system controller
  • Controller sets mode register bits for memory region to erase value
  • Data is erased from the memory region during refresh cycle
  • Other memory regions are normally refreshed based on mode register value
  • Controller notifies multitenancy controller of erased data
  • User can vacate from the memory system

Potential Applications

This technology could be applied in cloud computing environments, data centers, and shared memory systems where users may need to securely erase their data before leaving the system.

Problems Solved

This technology solves the problem of securely erasing user data from a multitenancy memory system without affecting other users' data or the overall system performance.

Benefits

The benefits of this technology include enhanced data security, efficient memory management, and improved user privacy in multitenancy memory systems.

Potential Commercial Applications

A potential commercial application of this technology could be in cloud service providers offering secure data erasure services to their customers, ensuring data privacy and compliance with data protection regulations.

Possible Prior Art

One possible prior art for this technology could be secure data erasure methods used in traditional single-user memory systems or storage devices.

Unanswered Questions

How does this technology impact the overall performance of the memory system?

The article does not provide specific details on how the erase function may affect the performance of the memory system as a whole. It would be important to understand if there are any potential slowdowns or bottlenecks introduced by the erase process.

What are the potential security implications of implementing this technology?

The article does not delve into the security aspects of the erase function and how it may prevent data breaches or unauthorized access to erased data. It would be crucial to explore how this technology enhances data security in multitenancy memory systems.


Original Abstract Submitted

Methods, systems, and devices for selectable memory system erase function are described. A user of a multitenancy memory system may request to vacate the memory system. A multitenancy controller may transmit an indication to erase data from a memory region associated with the user to a controller of the memory system. The controller may set bits of a mode register corresponding to the memory region to an erase value and other bits of the mode register corresponding to other memory regions to a normal value. The data may be erased from the memory region during the refresh cycle, while data from the other memory regions may be normally refreshed, according to the value of the bits in the mode register. The controller may indicate to the multitenancy controller that the data has been erased, and the multitenancy controller may enable the user to vacate from the memory system.