18493196. SEMICONDUCTOR MEMORY DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Jae Hyun Choi of Suwon-si (KR)
Hyun Seung Choi of Suwon-si (KR)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18493196 titled 'SEMICONDUCTOR MEMORY DEVICE
Simplified Explanation: The patent application describes a technology involving active regions on a substrate with a word line crossing them. A gate dielectric layer separates the word line from the active regions, and a capping insulating pattern covers the word line's upper surface with a bit line on top. The word line consists of a first conductive pattern with a second conductive pattern on top, including various elements like metal, work function adjustment, and diffusion barrier.
- Active regions defined by device isolation layer on a substrate
- Word line crossing active regions with gate dielectric layer in between
- Capping insulating pattern covering word line's upper surface
- Word line composed of first and second conductive patterns with different elements
- Diffusion barrier element in the second conductive pattern with smaller atomic radius than the metal element
Potential Applications: This technology can be applied in semiconductor manufacturing, specifically in the production of memory devices and integrated circuits.
Problems Solved: The technology addresses the need for efficient device isolation and improved performance in semiconductor devices by incorporating specific conductive patterns and elements.
Benefits: - Enhanced device isolation on the substrate - Improved performance and reliability of memory devices - Better control over electrical properties in integrated circuits
Commercial Applications: This technology could be valuable for semiconductor companies producing memory devices and integrated circuits, offering them a competitive edge in the market with improved performance and reliability.
Prior Art: Readers interested in exploring prior art related to this technology can start by researching patents in the field of semiconductor manufacturing, specifically focusing on device isolation and conductive patterns.
Frequently Updated Research: Researchers in the field of semiconductor technology may find relevant updates on advancements in device isolation techniques and materials used in memory device production.
Questions about the Technology: 1. What are the specific advantages of using a diffusion barrier element with a smaller atomic radius in the second conductive pattern? 2. How does the capping insulating pattern contribute to the overall performance of the semiconductor device?
Original Abstract Submitted
Active regions defined by device isolation layer are provided on a substrate. A word line crossing the active regions and a gate dielectric layer between the word line and the active regions are provided. A capping insulating pattern covering an upper surface of the word line and a bit line on the word line are provided. The word line may include a first conductive pattern and a second conductive pattern on the first conductive pattern. The first conductive pattern may include a first metal element. The second conductive pattern may include the first metal element, a work function adjustment element, and a diffusion barrier element. An atomic radius of the diffusion barrier element may be smaller than an atomic radius of the first metal element.
