18483211. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Hyun Soo Chung of Suwon-si (KR)
Young Lyong Kim of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18483211 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application includes a circuit board, an interposer structure, a mold layer, and two semiconductor chips positioned on the interposer structure and electrically connected to it.
- The interposer structure features multiple trenches in its edge region, extending through it.
- The mold layer is situated in the trenches, enveloping the semiconductor chips.
- The mold layer consists of a penetrating portion in the trenches and a stack portion on the interposer structure.
- The bottom surface of the penetrating portion of the mold layer aligns with the bottom surface of the interposer structure.
Potential Applications: - This technology can be utilized in the manufacturing of advanced semiconductor packages for various electronic devices. - It can be applied in the development of high-performance computing systems and mobile devices.
Problems Solved: - Provides a compact and efficient way to house and connect multiple semiconductor chips in a single package. - Ensures proper insulation and protection for the semiconductor chips.
Benefits: - Enhanced performance and reliability of electronic devices. - Cost-effective manufacturing process for semiconductor packages.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Electronic Devices This technology can be commercialized for the production of smartphones, tablets, laptops, and other consumer electronics. It can also be used in industrial applications such as data centers and servers.
Questions about Semiconductor Packaging Technology: 1. How does this technology improve the efficiency of electronic devices? - This technology enhances the performance and reliability of electronic devices by providing a compact and secure housing for multiple semiconductor chips. 2. What are the potential cost savings associated with implementing this semiconductor packaging technology? - By streamlining the manufacturing process and ensuring the protection of semiconductor chips, this technology can lead to cost savings in the production of electronic devices.
Original Abstract Submitted
A semiconductor package may include a circuit board, an interposer structure on the circuit board, a mold layer, and a first semiconductor chip and a second semiconductor chip spaced apart from each other in a first direction on a center region of the interposer structure and electrically connected to the interposer structure. The interposer structure may include a plurality of trenches in an edge region of the interposer structure and extending through the interposer structure. The mold layer may be in the plurality of trenches and may wrap the first and second semiconductor chips. The mold layer may include a penetrating portion in the plurality of trenches and a stack portion on the interposer structure. A bottom surface of the penetrating portion of the mold layer may be on a same plane as a bottom surface of the interposer structure.
