18481823. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Unbyoung Kang of SUWON-SI (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18481823 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application consists of multiple semiconductor chips facing each other, bumps on the front or rear surface of one of the chips, an underfill layer surrounding the bumps, and insulating frames on the front or rear surface of one of the chips, spaced apart from each other. The insulating frames overlap corner regions of the semiconductor chip in the direction in which the chips face each other.
- The semiconductor package includes multiple semiconductor chips facing each other.
- Bumps are present on the front or rear surface of one of the chips.
- An underfill layer surrounds the bumps for protection.
- Insulating frames are spaced apart on the front or rear surface of one of the chips.
- The insulating frames overlap corner regions of the chip in the direction of facing each other.
Potential Applications: - Semiconductor packaging industry - Electronics manufacturing
Problems Solved: - Protection of semiconductor chips - Enhanced structural integrity
Benefits: - Improved durability - Enhanced performance
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Durability This technology can be utilized in the semiconductor packaging industry to improve the durability and performance of electronic devices, leading to increased market competitiveness.
Prior Art: Information on prior art related to this technology is not provided in the abstract.
Frequently Updated Research: There is no information on frequently updated research related to this technology at the moment.
Questions about Semiconductor Packaging Technology: 1. How does the presence of insulating frames improve the structural integrity of the semiconductor package? 2. What are the specific advantages of having bumps on the front or rear surface of the semiconductor chips?
Original Abstract Submitted
A semiconductor package includes a plurality of semiconductor chips that face each other, a plurality of bumps disposed on a front surface or a rear surface of one of the plurality of semiconductor chips, an underfill layer that surrounds the plurality of bumps, and a plurality of insulating frames spaced apart from each other on the front or rear surface of one of the plurality of semiconductor chips. The plurality of insulating frames overlap a plurality of corner regions of the one of the plurality of semiconductor chips in a direction in which the plurality of semiconductor chips face each other.
