18481061. SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE simplified abstract (Sony Semiconductor Solutions Corporation)

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SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE

Organization Name

Sony Semiconductor Solutions Corporation

Inventor(s)

NAOTO Sasaki of NAGASAKI (JP)

YUTAKA Ooka of KANAGAWA (JP)

SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18481061 titled 'SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE

Simplified Explanation

The patent application describes a solid-state imaging element with reduced height and improved thermal expansion characteristics.

  • Solid-state imaging element is a wafer-level chip size package.
  • Includes an optical sensor chip, protective layer on light receiving surface, and rewiring layer on opposite surface.
  • Connection terminal of rewiring layer is a copper flat pad without a solder ball.
  • No alloy layer of tin and copper is formed on front surface of the flat pad.
  • Thermal expansion coefficient of protective layer is balanced with rewiring layer.

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      1. Potential Applications
  • Mobile devices such as smartphones and tablets
  • Digital cameras and camcorders
  • Medical imaging equipment
  • Automotive cameras for advanced driver assistance systems
      1. Problems Solved
  • Reduced height of solid-state imaging element
  • Improved thermal expansion characteristics
  • Enhanced reliability and durability of the imaging element
      1. Benefits
  • Compact size for electronic devices
  • Improved image quality and performance
  • Increased longevity and stability of the imaging element
  • Cost-effective manufacturing process


Original Abstract Submitted

The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.