18480291. CLOCK INTEGRATED CIRCUIT INCLUDING HETEROGENEOUS OSCILLATORS AND APPARATUS INCLUDING THE CLOCK INTEGRATED CIRCUIT simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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CLOCK INTEGRATED CIRCUIT INCLUDING HETEROGENEOUS OSCILLATORS AND APPARATUS INCLUDING THE CLOCK INTEGRATED CIRCUIT

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jaehong Jung of Bucheon-si (KR)

Seunghyun Oh of Seoul (KR)

Jihnyeon Lee of Suwon-si (KR)

Gihyeok Ha of Suwon-si (KR)

Seungjin Kim of Yongin-si (KR)

Joomyoung Kim of Hwaseong-si (KR)

Yelim Youn of Hwaseong-si (KR)

Jaehoon Lee of Suwon-si (KR)

CLOCK INTEGRATED CIRCUIT INCLUDING HETEROGENEOUS OSCILLATORS AND APPARATUS INCLUDING THE CLOCK INTEGRATED CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18480291 titled 'CLOCK INTEGRATED CIRCUIT INCLUDING HETEROGENEOUS OSCILLATORS AND APPARATUS INCLUDING THE CLOCK INTEGRATED CIRCUIT

Simplified Explanation

The clock integrated circuit described in the patent application includes two clock generators: a first clock generator with a crystal oscillator that generates a first clock signal, and a second clock generator with a resistance-capacitance (RC) oscillator and a first frequency divider. The second clock generator is responsible for generating a second clock signal using the first frequency divider and the clock signal from the RC oscillator.

The clock integrated circuit also performs two calibration operations. The first calibration operation adjusts the frequency division ratio of the first frequency divider to a first frequency division ratio based on the first clock signal. The second calibration operation adjusts the first frequency division ratio to a second frequency division ratio based on a sensed temperature.

  • The clock integrated circuit includes a first clock generator with a crystal oscillator that generates a first clock signal.
  • It also includes a second clock generator with an RC oscillator and a first frequency divider.
  • The second clock generator generates a second clock signal using the first frequency divider and the clock signal from the RC oscillator.
  • The clock integrated circuit performs a first calibration operation to adjust the frequency division ratio of the first frequency divider based on the first clock signal.
  • It also performs a second calibration operation to adjust the first frequency division ratio based on a sensed temperature.

Potential applications of this technology:

  • Clock integrated circuits are commonly used in electronic devices such as computers, smartphones, and digital appliances.
  • This clock integrated circuit can be used in any electronic device that requires accurate timing and synchronization.

Problems solved by this technology:

  • The clock integrated circuit ensures accurate timing and synchronization by using a crystal oscillator and an RC oscillator.
  • The calibration operations help maintain the accuracy of the frequency division ratio, compensating for any variations caused by temperature changes.

Benefits of this technology:

  • The clock integrated circuit provides precise clock signals for electronic devices, ensuring accurate timing and synchronization.
  • The calibration operations help maintain the accuracy of the frequency division ratio, improving the overall performance of the clock integrated circuit.
  • The integration of a crystal oscillator and an RC oscillator allows for flexibility in generating clock signals with different frequencies.


Original Abstract Submitted

A clock integrated circuit is provided. The clock integrated circuit includes: a first clock generator which includes a crystal oscillator configured to generate a first clock signal; and a second clock generator which includes a resistance-capacitance (RC) oscillator and a first frequency divider, and is configured to: generate a second clock signal using the first frequency divider based on a clock signal output from the RC oscillator; perform a first calibration operation for adjusting a frequency division ratio of the first frequency divider to a first frequency division ratio based on the first clock signal; and perform a second calibration operation for adjusting the first frequency division ratio to a second frequency division ratio based on a sensed temperature.