18475926. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18475926 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract describes a method of manufacturing a semiconductor package. Here are the key points:
- Forming a lower redistribution structure with lower redistribution patterns and lower connection pads.
- Forming an upper redistribution structure on the boundary surface of the lower redistribution structure with upper redistribution patterns and upper connection pads.
- Creating openings to expose a portion of each lower connection pad.
- Placing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate.
- Electrically connecting the lower connection pads of the interposer substrate to wiring patterns of the base substrate through lower connection bumps on the openings.
- Placing at least one semiconductor chip with connection pads on the interposer substrate.
- Electrically connecting the connection pads of the semiconductor chip to the upper connection pads through upper connection bumps.
Potential Applications:
- Manufacturing semiconductor packages for various electronic devices such as smartphones, computers, and IoT devices.
- Integration of multiple semiconductor chips in a compact and efficient manner.
Problems Solved:
- Provides a method for connecting semiconductor chips to a base substrate with improved electrical connections.
- Enables the integration of multiple semiconductor chips in a smaller package size.
- Facilitates the manufacturing process of semiconductor packages.
Benefits:
- Improved electrical connections between semiconductor chips and base substrates.
- Increased integration density of semiconductor chips in a package.
- Enhanced reliability and performance of semiconductor packages.
- Cost-effective manufacturing process for semiconductor packages.
Original Abstract Submitted
A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically connected to the upper connection pads through upper connection bumps.
