18472169. MULTI-NODE COMPUTING SYSTEM simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MULTI-NODE COMPUTING SYSTEM
Organization Name
Inventor(s)
Eric Richard Borch of Fort Collins CO (US)
MULTI-NODE COMPUTING SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18472169 titled 'MULTI-NODE COMPUTING SYSTEM
Simplified Explanation:
The patent application describes a multi-node computing system with two compute boards connected by network planes, compute elements, and memories storing instructions for deactivating a network plane when a specific criterion is met.
Key Features and Innovation:
- Multi-node computing system with two compute boards
- Plurality of compute elements and memories
- First and second network planes connecting the compute boards
- Instructions stored in memories for deactivating a network plane based on a criterion
Potential Applications: This technology could be used in data centers, cloud computing environments, and high-performance computing systems.
Problems Solved: The technology addresses the need for efficient communication and resource management in multi-node computing systems.
Benefits:
- Improved performance and resource utilization
- Enhanced scalability and flexibility in computing systems
Commercial Applications: Potential commercial applications include server farms, scientific research facilities, and large-scale data processing centers.
Prior Art: Readers can explore prior art related to multi-node computing systems, network planes, and resource management in distributed computing environments.
Frequently Updated Research: Stay informed about the latest advancements in multi-node computing systems, network optimization, and distributed computing technologies.
Questions about Multi-Node Computing Systems: 1. What are the key components of a multi-node computing system? 2. How does the deactivation of a network plane impact system performance and efficiency?
Original Abstract Submitted
A multi-node computing system. In some embodiments, the system includes: a first compute board, a second compute board, a plurality of compute elements, a plurality of memories, a first network plane connecting the first compute board and the second compute board, and a second network plane connecting the first compute board and the second compute board. The plurality of memories may store instructions that, when executed by the plurality of compute elements, cause the plurality of compute elements to: determine that a criterion for deactivating the first network plane is met, and deactivate the first network plane.
