18458152. MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract (SK hynix Inc.)
Contents
MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAME
Organization Name
Inventor(s)
Chan Keun Kwon of Gyeonggi-do (KR)
Hyeon Cheon Seol of Gyeonggi-do (KR)
MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18458152 titled 'MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAME
The memory system described in the patent application involves two memory devices that compress data read from different memory regions and output the compressed data through selection lines in response to specific clocks. A parallel transmission unit connects the selection lines of the two memory devices to output lines, transmitting the compressed data in parallel based on a selection clock with a lagging phase between the two clocks.
- Memory system with two memory devices compressing data from different memory regions
- Parallel transmission unit connecting selection lines of memory devices to output lines
- Transmission of compressed data in parallel based on a selection clock with a lagging phase
- Efficient data compression and transmission process
- Synchronization of data output from multiple memory devices
Potential Applications: - Data storage systems - High-speed data processing applications - Embedded systems requiring efficient memory management
Problems Solved: - Efficient compression and transmission of data from multiple memory regions - Synchronization of data output from different memory devices
Benefits: - Improved data processing speed - Reduced memory space usage - Enhanced overall system performance
Commercial Applications: Title: "Efficient Memory System for Data Compression and Transmission" This technology can be utilized in various industries such as telecommunications, automotive, and consumer electronics for faster data processing and improved memory management.
Prior Art: Readers can explore prior patents related to memory systems, data compression, and parallel transmission technologies to understand the evolution of similar concepts in the field.
Frequently Updated Research: Researchers are constantly exploring new methods to enhance memory systems' efficiency, data compression techniques, and parallel transmission technologies to meet the increasing demands of modern computing systems.
Questions about Memory Systems: 1. How does the selection clock with a lagging phase optimize the parallel transmission of compressed data? 2. What are the potential challenges in implementing this memory system in real-world applications?
Original Abstract Submitted
A memory system comprising a first memory device configured to compress, into first compression data, data read from a first memory region included therein, and output the first compression data through first selection lines among first output lines in response to a first clock, a second memory device configured to compress, into second compression data, data read from a second memory region included therein, and output the second compression data through second selection lines among second output lines in response to a second clock; and a first parallel transmission unit configured to simultaneously connect the first and second selection lines to third output lines, select, as a selection clock, one having a lagging phase to the other between the first clock and the second clock, and transmit the first and second compression data in parallel through the third output lines in response to the selection clock.
