18458071. SEMICONDUCTOR STORAGE DEVICE simplified abstract (Kioxia Corporation)

SEMICONDUCTOR STORAGE DEVICE

Organization Name

Kioxia Corporation

Inventor(s)

Shingo Nakazawa of Kamakura Kanagawa (JP)

Yuki Inuzuka of Yokohama Kanagawa (JP)

SEMICONDUCTOR STORAGE DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18458071 titled 'SEMICONDUCTOR STORAGE DEVICE

Simplified Explanation

The semiconductor storage device described in the abstract includes multiple components such as word lines, select gate lines, memory cells, select transistors, and a logic control circuit. The device is designed to perform read operations on memory cells by independently controlling select gate lines to turn off select transistors connected to memory cells other than the one being read.

• The semiconductor storage device includes a first memory pillar with a first memory cell connected to the first word line.
• The logic control circuit performs read operations to read threshold voltages of memory cells.
• The select gate lines are controlled independently during read operations to turn off select transistors connected to memory cells other than the one being read.

Potential Applications

This technology can be applied in:

• Solid-state drives
• Flash memory devices
• Embedded systems

Problems Solved

This technology helps in:

• Improving read operations in semiconductor storage devices
• Enhancing data retrieval efficiency
• Reducing power consumption

Benefits

The benefits of this technology include:

• Faster read operations
• Enhanced data storage capabilities
• Improved overall performance of semiconductor storage devices

Potential Commercial Applications

The potential commercial applications of this technology can be seen in:

• Consumer electronics
• Data centers
• Automotive industry

Possible Prior Art

One possible prior art for this technology could be the use of select gate lines to control transistors in semiconductor storage devices.

What are the specific threshold voltages being read in the memory cells?

The specific threshold voltages being read in the memory cells are the key parameters that determine the state of the memory cell, whether it is storing a 0 or a 1.

How does the logic control circuit independently control the select gate lines during read operations?

The logic control circuit independently controls the select gate lines during read operations by sending signals to each select gate line individually, turning off select transistors connected to memory cells other than the one being read.

Original Abstract Submitted

A semiconductor storage device includes a first word line, a second word line, a first select gate line, a second select gate line, a third select gate line, a fourth select gate line, a first memory pillar including a first memory cell connected to the first word line, a first select transistor connected to the first select gate line, a second memory cell connected to the second word line, and a second select transistor connected to the second select gate line, and a logic control circuit configured to perform a read operation to read threshold voltages of the first and second memory cells, respectively. The logic control circuit independently controls the first to fourth select gate lines during the read operation to turn the select transistors electrically connected to memory cells other than the memory cell to be read to off state.