18455958. PHY LANES DISABLING FOR POWER EFFICIENCY (Western Digital Technologies, Inc.)
Contents
PHY LANES DISABLING FOR POWER EFFICIENCY
Organization Name
Western Digital Technologies, Inc.
Inventor(s)
Shay Benisty of Beer Sheva (IL)
PHY LANES DISABLING FOR POWER EFFICIENCY
This abstract first appeared for US patent application 18455958 titled 'PHY LANES DISABLING FOR POWER EFFICIENCY
Original Abstract Submitted
Instead of entering lanes into an unused power state, enter unactive lanes into an unconnected power state to save more current during low power states. Using a small control logic will allow a controller to control unactive lanes in low power mode. When a lane is in an unactive power state or in an unused power state, an unactive lane controller (ULC) uses side-band signaling to place the unactive lane into either unused power state or unconnected power state. When a lane is in unused power state, then the ULC places the lane in unconnected power state. A single ULC is able to controller multiple lanes or you can have multiple ULC's, each controlling a single lane.
