18452616. MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
Organization Name
Inventor(s)
Yunkyeong Jeong of Suwon-si (KR)
Eungchang Lee of Suwon-si (KR)
Chul-Hwan Choo of Suwon-si (KR)
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18452616 titled 'MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
The memory device described in the patent application consists of a base die with a pair of second dies and a first die positioned between them, along with a memory stack composed of memory dies stacked vertically on the base die. The first die is connected to the memory stack and contains a logic transistor with a three-dimensional structure channel.
- The memory device includes a base die with a pair of second dies and a first die positioned between them.
- A memory stack is formed by sequentially stacking memory dies on the base die in a vertical direction.
- The first die is electrically connected to the memory stack and features a logic transistor with a three-dimensional structure channel.
Potential Applications: - This memory device could be used in various electronic devices such as smartphones, tablets, and computers. - It could also find applications in data centers and servers for high-performance computing tasks.
Problems Solved: - The memory device provides a compact and efficient way to store and access data in electronic devices. - It offers improved performance and reliability compared to traditional memory solutions.
Benefits: - Enhanced data storage and retrieval capabilities. - Increased efficiency and speed in electronic devices. - Compact design for space-saving in devices.
Commercial Applications: Title: "Innovative Memory Device for Enhanced Data Storage" This technology could be utilized in consumer electronics, data centers, and other computing devices to improve memory performance and efficiency, potentially leading to increased market competitiveness.
Prior Art: There is no specific information provided on prior art related to this technology in the patent application.
Frequently Updated Research: There is no information available on frequently updated research relevant to this technology in the patent application.
Questions about Memory Device: 1. How does the three-dimensional structure channel in the logic transistor of the first die enhance memory performance? 2. What are the potential cost implications of implementing this memory device in electronic devices?
Original Abstract Submitted
Disclosed is a memory device which includes a base die that includes a pair of second dies and a first die that is between the pair of second dies, and a memory stack that includes memory dies sequentially stacked on the base die in a vertical direction. The first die is electrically connected to the memory stack, and the first die includes a logic transistor including a channel of a three-dimensional structure.
