18448902. MEMORY DEVICE AND ZQ CALIBRATION METHOD simplified abstract (Changxin Memory Technologies, Inc.)
Contents
MEMORY DEVICE AND ZQ CALIBRATION METHOD
Organization Name
Changxin Memory Technologies, Inc.
Inventor(s)
MEMORY DEVICE AND ZQ CALIBRATION METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18448902 titled 'MEMORY DEVICE AND ZQ CALIBRATION METHOD
Simplified Explanation
The patent application describes a memory device that includes two calibration resistor interfaces connected to the same ZQ calibration resistor. It also includes a first master chip, first slave chips, a second master chip, and second slave chips, all commonly connected to the ZQ calibration resistor.
- The memory device operates in a command mode where it receives a ZQ calibration command through a first signal receiver and delays it using a second signal receiver.
- The first and second slave chips then start calibrating based on a ZQ flag signal.
- Once the calibration is completed, the first and second slave chips send a ZQ flag signal through second transmission terminals.
Potential Applications
- Memory devices in computer systems
- Embedded systems requiring memory calibration
Problems Solved
- Efficient calibration of memory devices
- Simplified calibration process
Benefits
- Improved performance and reliability of memory devices
- Simplified design and implementation of memory calibration
Original Abstract Submitted
A memory device includes: two calibration resistor interfaces connected to the same ZQ calibration resistor; and a first master chip, first slave chips, a second master chip, and second slave chips, which are commonly connected to the ZQ calibration resistor; in a command mode, a first signal receiver is used to receive a ZQ calibration command, a second signal receiver is used to receive and delay the ZQ calibration command, the first slave chips and the second slave chips start to calibrate based on the ZQ flag signal, and after the calibration is completed, the first slave chips and the second slave chips send a ZQ flag signal through second transmission terminals.
