18444619. HETEROGENEOUS ACCELERATOR FOR HIGHLY EFFICIENT LEARNING SYSTEMS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
HETEROGENEOUS ACCELERATOR FOR HIGHLY EFFICIENT LEARNING SYSTEMS
Organization Name
Inventor(s)
Krishna T. Malladi of San Jose CA (US)
Hongzhong Zheng of Los Gatos CA (US)
HETEROGENEOUS ACCELERATOR FOR HIGHLY EFFICIENT LEARNING SYSTEMS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18444619 titled 'HETEROGENEOUS ACCELERATOR FOR HIGHLY EFFICIENT LEARNING SYSTEMS
The patent application describes an apparatus with a heterogeneous computing environment controlled by a task scheduler. This environment includes a processing unit with fixed logical circuits, a reprogrammable processing unit with reprogrammable logical circuits for processing-in-memory functionality, and a stack of high-bandwidth memory dies.
- The apparatus includes a processing unit with fixed logical circuits for executing instructions.
- It also includes a reprogrammable processing unit with reprogrammable logical circuits for processing-in-memory functionality.
- The high-bandwidth memory dies in the stack provide data storage and processing-in-memory functionality.
- The task scheduler schedules computational tasks between the processing unit and the reprogrammable processing unit.
Potential Applications: - High-performance computing tasks - Artificial intelligence and machine learning applications - Data analytics and processing tasks
Problems Solved: - Improved efficiency in processing tasks - Enhanced performance in memory-intensive applications - Better utilization of resources in heterogeneous computing environments
Benefits: - Faster processing speeds - Reduced latency in data access - Enhanced overall system performance
Commercial Applications: Title: "Next-Generation Computing Systems for High-Performance Applications" This technology could be used in industries such as: - Cloud computing - Data centers - Scientific research institutions
Questions about the technology: 1. How does the reprogrammable processing unit enhance processing-in-memory functionality? 2. What advantages does the stack of high-bandwidth memory dies offer in terms of data processing and storage efficiency?
Original Abstract Submitted
An apparatus may include a heterogeneous computing environment that may be controlled, at least in part, by a task scheduler in which the heterogeneous computing environment may include a processing unit having fixed logical circuits configured to execute instructions; a reprogrammable processing unit having reprogrammable logical circuits configured to execute instructions that include instructions to control processing-in-memory functionality; and a stack of high-bandwidth memory dies in which each may be configured to store data and to provide processing-in-memory functionality controllable by the reprogrammable processing unit such that the reprogrammable processing unit is at least partially stacked with the high-bandwidth memory dies. The task scheduler may be configured to schedule computational tasks between the processing unit, and the reprogrammable processing unit.
